Xilinx / mlir-aie

An MLIR-based toolchain for AMD AI Engine-enabled devices.
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Make aiex.npu.dma_memcpy_nd d0 stride explicit #1586

Closed fifield closed 6 days ago

fifield commented 1 week ago

The stride of the inner dimension is assumed to be one for npu.dma_memcpy_nd (e.g. here). This PR makes it an explicit operand.

replaces #1584

github-actions[bot] commented 1 week ago

Coverage Report

Created: 2024-06-28 20:13

Click here for information about interpreting this report.

FilenameFunction CoverageLine CoverageRegion CoverageBranch Coverage
IR/AIEXDialect.cpp 100.00% 90.42% 89.86% 80.85%
Transforms/AIEDmaToNpu.cpp 100.00% 95.77% 91.46% 82.76%
Totals 100.00% 92.94% 90.43% 81.58%
Generated by llvm-cov -- llvm version 14.0.0