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Xilinx / mlir-aie

An MLIR-based toolchain for AMD AI Engine-enabled devices.
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Parametrize Number of Used AIE Columns in Whole Array Matrix Multiplication Design #1598

Closed andrej closed 2 months ago

andrej commented 3 months ago

Adapts the whole array design to make it possible to run matrix multiplication on 1, 2 or 4 columns with configurable parameter n_aie_cols. The number of used rows remains fixed at 4.

For 4 columns (default) this should be the same as the previous whole_array design.

For 2 and 1 columns, the mem tiles hold double (or quadruple) the tile size of A and then distribute those to all rows in the array. Thus, it may be necessary to reduce tile size if you run into memory limits with designs with fewer columns.

Also cleans up the code a bit. Adds tests for 1 and 2 column designs as well by running the same design with different parameters.

andrej commented 3 months ago

@jgmelber

Since I cleaned up a lot of the code it may be hard to see what actually changed to make it work on multiple columns.

So if you are curious about that specifically, commit ac4e83274d9d181a0c7193621fe6c42c40bb4785 and the next one show most of the necessary changes for making it work on multiple columns specifically. (Although I did also rename some variables in that first one ... sorry)