Xilinx / mlir-air

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Refactor AIRRt symbolic linkage matching logic #637

Closed erwei-xilinx closed 3 months ago

erwei-xilinx commented 3 months ago
fifield commented 3 months ago

This PR changes the examples. Is that because they had bugs or is it to workaround bugs in the compiler?

hunhoffe commented 3 months ago

My understanding is that there were bugs in the examples.

I believe this PR fixes one of the failing examples (multi core dma, associated with this issue: https://github.com/Xilinx/mlir-air/issues/624) but I will need to rewrite the multi core channel example to better fit the channel abstraction/implementation (changes needed described in comments here: https://github.com/Xilinx/mlir-air/issues/625).