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Xilinx / qemu

Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms.
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/821395464/QEMU+User+Documentation
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Uncomplete ARM GICv1 TrustZone implementation #8

Open RobertBuhren opened 8 years ago

RobertBuhren commented 8 years ago

Hi,

the current ARM GIC implementation ignores writes to the IGROUP register if the GIC is a revision 1 GIC. This is not the correct behaviour as a revision 1 GIC with TrustZone extension does have the IGROUP register (see ARM Generic Interrupt Controller Architecture Specification 2.0, Page 4-91).

This is the check in the source code: https://github.com/Xilinx/qemu/blob/pub/2015.2.plnx/hw/intc/arm_gic.c#L688

This results in qemu ignoring that I configured all interrupts to group 1, but won't enable any interrupt from non-secure either because qemu still thinks they belong to group 0. https://github.com/Xilinx/qemu/blob/pub/2015.2.plnx/hw/intc/arm_gic.c#L712

A quick glance over the upstream qemu showed that they have fixed it by introducing an "gic_has_groups()" call to determine the existence of the IGROUP register and not simply the revision. http://git.qemu.org/?p=qemu.git;a=blob;f=hw/intc/arm_gic.c;h=13e297d52eb75783e8fef53c05f373a453240112;hb=HEAD#l752

Regards,

Robert

alistair23 commented 8 years ago

Hello,

Thank you for pointing this out. I will look into it as soon as I can. If you would like to you can submit a pull request, otherwise I will try to fix the issue as soon as possible.

Thanks,

Alistair