Xilinx / qemu

Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms.
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/821395464/QEMU+User+Documentation
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qemu support of VCR register on Cortex-A9 #88

Open 0agvp0 opened 10 months ago

0agvp0 commented 10 months ago

Environment

I am running the Xilinx-forked qemu-system-aarch64 on Ubuntu 22.04.

$ ./aarch64-softmmu/qemu-system-aarch64 --version
QEMU emulator version 7.1.0 (v2.6.0-55433-g23b643ba16)
Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers

My intention is to emulate Zynq-7000 (ARM Cortex-A9). In order to do so, I have followed Xilinx's instructions when passing arguments to the executable, which results in:

$ ./aarch64-softmmu/qemu-system-aarch64 -M arm-generic-fdt-7series -machine linux=on -serial /dev/null -serial mon:stdio -display none -dtb path/to/system.dtb -m 512M -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 -device loader,addr=0xf8000140,data=0x00500801,data-len=4 -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 -device loader,addr=0xf8000108,data=0x0001e008,data-len=4 -device loader,addr=0xf8000910,data=0x0000000F,data-len=4 -gdb tcp::9000 -S

Objective

I would like to run a bare-metal application which, among others, configures the Virtualization Control Register (VCR) to force in a non-secure state an exception regardless of the status of the CPSR. The disassembly code of the instruction is the following, where r0 is the value to be written:

c38: mcr 15, 0, r0, cr1, cr1, {3}

Issue

On an actual Zynq-7000 target, such instruction executes correctly. However, when executing qemu on GDB, an unimplemented register error is generated after the do_coproc_insn qemu function chacks that it is not a known register. If qemu trace is enabled (adding -d unimp -D log.txt) flags to the launching command), the following is logged:

write access to unsupported AArch32 system register cp:15 opc1:0 crn:1 crm:1 opc2:3 (secure)

I have not been able to find updated documentation about the extent of the ARM Secure Extensions support on qemu. Can I confirm that this register is indeed not supported? Is there any place where I can find the supported and unsupported cp15 registers for Cortex-A9?

Thanks in advance