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SDx ERROR: [VPL-4] Design failed to meet timing. #42

Closed microlijun closed 5 years ago

microlijun commented 5 years ago

Hi, I was migrating my OpenCV application to xfOpenCV. I got the following error when build with SDx2018.2. How can I fix this?


[16:40:23] Starting bitstream generation..

===>The following messages were generated while Compiling (bitstream) accelerator binary: bin Log file: /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0/vivado/prj/prj.runs/impl_1/runme.log : ERROR: [VPL-4] Design failed to meet timing. Failed timing checks (paths): {zcu102_rv_ss_i/zynq_ultra_ps_e_0/inst/PS8_i/MAXIGP0ACLK --> zcu102_rv_ss_i/axi_interconnect_hpm0/m14_couplers/auto_cc/inst/gen_clock_conv.gen_sync_conv.gen_conv_write_ch.w_sync_clock_converter/gen_sync_clock_converter.m_tvalid_r_reg/D}

Please check the routed checkpoint (dr_routed_timing.dcp) and timing summary report (dr_timing_summary.rpt) for more information. ERROR: [VPL 60-704] Integration error, problem implementing dynamic region, route_design ERROR ERROR: [VPL 60-806] Failed to finish platform linker ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling '/home/jun/Programs/Xilinx2018.2/SDx/2018.2/bin/vpl --iprepo /home/jun/workspace_sdx/VideoFusion/Release/_sds/iprepo/repo --iprepo /home/jun/Programs/Xilinx2018.2/SDx/2018.2/data/ip/xilinx --platform /home/jun/zcu102-rv-ss-2018-2/zcu102_rv_ss/zcu102_rv_ss.xpfm --temp_dir /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0 --output_dir /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0/vpl --input_file /home/jun/workspace_sdx/VideoFusion/Release/_sds/p0/.xsd/top.bd.tcl --target hw --save_temps --kernels w0_xf_boxFilter:w3_xf_add:w2_xf_subtract:w1_xf_multiply:w4_xf_calcHist:adapter --webtalk_flag SDSoC --remote_ip_cache /home/jun/workspace_sdx/ip_cache --xp "vivado_prop:run.impl_1.{STEPS.PHYS_OPT_DESIGN.ARGS.MORE OPTIONS}={-directive Explore}" --xp "vivado_prop:run.impl_1.{STEPS.ROUTE_DESIGN.ARGS.MORE OPTIONS}={-directive Explore}" --xp "param:compiler.deleteDefaultReportConfigs=false" ' sds++ log file saved as /home/jun/workspace_sdx/VideoFusion/Release/_sds/reports/sds.log ERROR: [SdsCompiler 83-5004] Build failed sds++ completed at Tue Mar 19 16:45:02 UTC 2019

akashsun commented 5 years ago

This means that the design that you are trying to build is not meeting the timing for the particular frequency you are building it for. Your design might have one or more paths where the set of operations in the path is expected to be completed in a cycle, but for that frequency the clock period is too short for that to happen. You might have to recode to optimize your design to meet the frequency that you are building it for or you have to reduce the frequency itself.

For analyzing the critical paths you can open the file dr_timing_summary.rpt in the path _sds/p0/vivado/vpl/prj/prj.runs/impl_1/ in your project. This file gives you the list of critical paths and starting and endpoints for each paths with the corresponding negative slacks.