Closed wang120332076 closed 6 years ago
The lowercase or uppercase does not matter when synthesizing in Vivado HLS. Only in SDx, during the initial stage of compilation (of ARM), this warning is being issued, which anyway has no effect on the generated binary.
However, the pragmas in the code will be updated to use uppercase wherever required, to ensure no such warnings are thrown. Thanks for bringing this up!
Fixed
I am trying to compile Canny edge detector for my ZedBoard, and during compilation my SDx 2017.2 always reports this warning
I checked both master branch and tag 2017.2, finding that the "hls inline" are in lowercase in both branches/tags. Is that a typo or this is the right way to do it?