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Xilinx / xup_aie_training

Hands-on experience programming AI Engines using Vitis Unified Software Platform
https://xilinx.github.io/xup_aie_training/
MIT License
36 stars 9 forks source link

[Issue] update Makefile for PBL to use `sim` target #18

Open mariodruiz opened 10 months ago

mariodruiz commented 10 months ago

@vickyiii can you please check this?

See reference:

https://github.com/Xilinx/xup_aie_training/blob/88203dfd3b800ee4b622ead99ab3b5dcabb41d87/sources/template_lab/aie/Makefile#L44-L52

Also update notebooks content.