We conducted the following tests in the laboratory:
1) cycle: power on + delay + deep sleep (timer)
2) cycle: power on + spi on + delay + spi off + delay + deep sleep (timer)
3) cycle: power on + spi/SD on + delay + SD/spi off + delay + deep sleep (timer)
Results during deep sleep state:
1) 0.9mA
2) 1.7 mA
3) 17 mA
How can we completely eliminate residual currents when SPI and/or SD is used.
Please provide me an example or ask questions, glad to share code and additional information to solve the issue.
We just acquired several units and we will increase volume once this issue will be solved.
Hi
We conducted the following tests in the laboratory:
1) cycle: power on + delay + deep sleep (timer) 2) cycle: power on + spi on + delay + spi off + delay + deep sleep (timer) 3) cycle: power on + spi/SD on + delay + SD/spi off + delay + deep sleep (timer)
Results during deep sleep state: 1) 0.9mA 2) 1.7 mA 3) 17 mA
How can we completely eliminate residual currents when SPI and/or SD is used.
Please provide me an example or ask questions, glad to share code and additional information to solve the issue.
We just acquired several units and we will increase volume once this issue will be solved.
Thanks V.