Drop voltage on 3.3V rail after enabling prw_en pin

[viteka32]

We using and testing LilyGo 4,7 Plus and have a problem with resetting ESP32 after enabling display with sequences epd_init and epd_poweron. We found a bug on PCB. Enabling display generating 0.9A peak and voltage level on LDO 3.3V drop to 2.2V. There is ESP32 randomly resetting. Used LDO doesn't have the capacity for this current peak. I am testing adding a blocking capacitor on 3.3V rail and 1000uF value can be blocking this peak when the voltage doesn't drop under 3V.

Testing code:

void setup() {
  delay(500);
  epd_init();
  delay(500);
  epd_poweroff_all();
  esp_sleep_enable_timer_wakeup(2 * 1000000ULL);  //sleep in microseconds
  esp_deep_sleep_start();
}

Current measured: The first sequence is correct and the next is wrong.

The voltage on 3.3V supply during a current surge:

Have you encountered this problem too? Do you have any solution for this?

[brianwyld]

Same problem on T5+. I note the original T5 does not seem to have this issue.

Did the 1000uF fix it?

[viteka32]

Yes, the 1000uF capacitor will prevent the power supply from dropping below 3V. Although this is a fairly short peak, the restart appears to be random. Instead of a capacitor, adding a delay (20 ms) right after switching on the display power branch also helped us a lot.

[homonto]

1mF capacitor for such small project is totally wrong design. It might be a solution but for sure it is a mistake of the design. Btw where does this 0.89A go?

[viteka32]

Yes, for this type of design, a 1mF capacitor is not the right solution. For example, with LTE 2G, it would mostly be necessary. From the measurements, we found that the pulse is generated when the DC/DC converter LT1945 and display are switched on. (The greatest credit goes to the LT1945 power supply circuit with accompanying regulators)

[homonto]

Yes, for this type of design, a 1mF capacitor is not the right solution. For example, with LTE 2G, it would mostly be necessary. From the measurements, we found that the pulse is generated when the DC/DC converter LT1945 and display are switched on. (The greatest credit goes to the LT1945 power supply circuit with accompanying regulators)

from the datasheet of LT1945 it has a limit to 350mA however, the peak current can reach easily even 1A - after 0.1ms the regulator is OFF completely. But, the LT1945 is not a load so this current is NOT related to LT1945 being ON, but to other element, that consumes that current during the transient. The decoupling capacitors are exactly to reduce the voltage swings, but 1mF is not in the normal range of such capacitors

[brianwyld]

after reviewing the schematic for the T5-PLUS board, and looking at the driver code, I am confused.

1/ epaper power supply control: In the code (ed047tc1.c), I find epd_power_on() and epd_power_off().

For power on, it sets bits named "scan_direction=true", "power_disable=false", "neg_power_enable=true", "pos_power_enable=true" and "ep_stv=true", in order, with a delay between them.

For power_off, its "pos_power_enable=false", "neg_power_enable=false", "power_disable=true", "ep_stv=false", again in order iwth a delay.

HOWEVER:

• on the schematic, power_disable->SMPS_CTRL, neg_power_enable->NEG_CTRL, pos_power_enable->POS_CTRL : and all 3 only go to the rPI 40 pin header NO IMPACT ON EPAPER POWER SUPPLY

• 'scan_direction' is in fact PWR_EN, and switches 3V3 from the main LDO to the epaper power circuitry... is NOT turned off in epd_poweroff(), only in epd_poweroff_all() (which sets all the shift reg outputs to false.... is set to true in epd_init() -> hence brownout as soon as driver is initialised, before even epd_poweron() is called!

Where did you add the 20ms delay to avoid the brownout?

Is this right? If so, I think some fixes are required in the code:

• no need to do anything to 'power_disable', 'pos_power_enable' or 'neg_power_enable', they are not used on this board
• scan_direction renamed to 'pwr_en', and set to false in epd_init(), and epd_poweroff() this should help low power operation as no longer driving the epaper boost circuit

2. pwr_en impact on VBAT
   • it seems like VBAT is switched directly onto the '5V' signal when pwr_en is true (by Q3). This seems like a bad thing to do to the battery when plugged in to the USB and hence there is really 5V on this trace (instead of charging it through the HX6610S 'normally').
   • any explanation of what this circuit with Q3 is supposed to do?

thanks!

[brianwyld]

Tried code as indicated above:

• saves me 1mA in lightsleep() mode
• saves about 30mA when not actively writing to the epaper
• peak inrush when turning on is about 400mA once running,

attached some power captures (OTII on the battery connector @3.75V)

[brianwyld]

One of my boards is very sensitive to the voltage drop, the other less so. A 470uF electrolytic across VDD_3V3 seems to fix it, but is kind of ugly.

[brianwyld]

For a 'final' fix I went with a SMT 470uF tant capacitor as in the photo below :

• the capa is the orange rectangle
• -ve side to GND from the SD card connector
• +ve side wired directly to the ESP32 VDD_3V3 input pin
• ignore the black wire which is left from previous tries with smaller MLCC caps)