High % of CRC errors using T3S3

Xinyuan-LilyGO / LilyGo-LoRa-Series

LILYGO LoRa Series examples

644 stars 177 forks source link

High % of CRC errors using T3S3 #135

Closed Tom-E closed 5 months ago

Tom-E commented 7 months ago

Hi, Running at for example 500khz + SF12, I have ~20% CRC errors! From what I can tell, a TCXO should be able to help with this which I believe this board has? Do the examples use this correctly, if so why is the CRC % so high?

This is with an T3S3 v1.2 SX1262

Note that if I change to different settings, for example 62khz + SF5, the CRC error rate will drop to ~1%.

How can I reduce the % of CRC errors while keeping a longer range configuration?

lewisxhe commented 7 months ago

c84dedb7a2ed174da668e19f69b2c37 DS_SX1261-2_V2_1.pdf In the latest specification book released by semtech company, page 105

github-actions[bot] commented 6 months ago

This issue is stale because it has been open for 30 days with no activity.

github-actions[bot] commented 5 months ago

This issue was closed because it has been inactive for 14 days since being marked as stale.