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Xtra-Computing / ReGraph

Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
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Some problem in implementing the accelerator for PageRank on Alveo U280 platform #1

Open hhhhjun opened 1 year ago

hhhhjun commented 1 year ago

Hi, I encountered the following problems when running code on U280. My system is Ubuntu 20.04.5. My vitis version is Vitis-Tutorials-2022.2. The device I used is xilinx_u280_gen3x16_xdma_1_202211_1. And the error is reported as follows :ERROR: [Constraints 18-1000] Routing results verification failed due to partially-conflicted nets (Up to first 10 of violated nets): level0_i/ulp/littleKernelScatterGather_10/inst/Loop_readEdges_proc3_U0/grp_Loop_readEdges_proc3_Pipeline_readEdges_fu_96/din[58] level0_i/ulp/bigKernelScatterGather_1/inst/accGather_4_U0/grp_accGather_4_Pipeline_VITIS_LOOP_299_2_fu_34/one_update_tuple_update_V_reg_419[3] level0_i/ulp/bigKernelScatterGather_1/inst/accGather_4_U0/grp_accGather_4_Pipeline_VITIS_LOOP_299_2_fu_34/lshr_ln_reg_433_reg[14]_0[10] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[92] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[88] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[87] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[86] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[84] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[82] level0_i/ulp/bigKernelScatterGather_1/inst/Loop_readEdges_proc4_U0/grp_Loop_readEdges_proc4_Pipeline_readEdges_fu_108/edge_burst_stm_din[81] I want to know how to solve this problem. Thank you.

Matsubarai commented 8 months ago

I faced the same problem recently. My solution is to add --kernel_frequency=250 option in v++ linking, and it works at 220 MHz. A modified version with Vitis 2022.2 support is here.