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Project Apicula 🐝: bitstream documentation for Gowin FPGAs
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Implement power saving primitive BANDGAP #257

Closed yrabbit closed 1 day ago

yrabbit commented 2 weeks ago

As the board on the GW1N-1 chip becomes a rarity, its replacement is the Tangnano1k board with the GW1NZ-1 chip. This chip has a unique mechanism for turning off power to important things such as OSC, PLL, etc.

Here we introduce a primitive that allows energy saving to be controlled dynamically.

Nextpnr will add this primitive automatically if we do not use it explicitly - this is done to explicitly connect the control input since its default connection is neither VCC nor GND.

BANDGAP only has an input, but does not have a fuse - it is on all the time. Of course, a reasonable question arises - what are these magic numbers in line 2258-2259 of gowin_pack.py?

I really don’t want to consider these BANDGAP fuses precisely because this primitive is not configurable - and these bits are fuses that appear in the db.shortval[49]['unknown_75'] and db.logicinfo['unknown_74'] tables , which clearly describe something with decent configuration capabilities. This could be some kind of adjustable voltage stabilizer, which has an input MUX for control signals and one of the combinations connects BANDGAP.

But this is not part of BANDGAP and I think I'll leave it as it is.

A test example has also been added - himbaechel/bandgap.v - when you press the BANDGAP button, it is triggered and turns off the power to the OSC generator and the LED stops blinking.

uis246 commented 1 week ago

Maybe in few weeks or a month if I will have free time I may try to look into it.