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YosysHQ / arachne-pnr

Place and route tool for FPGAs
MIT License
413 stars 73 forks source link

Map inout ports to input/output if they're not actually tristate #110

Closed whitequark closed 6 years ago

whitequark commented 6 years ago

Fixes #24.

This doesn't handle the degenerate case of doing e.g.

module top(inout x[7:0]);
  assign x[0] = x[1];
endmodule

and I think can't possibly handle it. In any case it does not seem important to me to handle this case implicitly.

whitequark commented 6 years ago

Also, I would like to complain. Does anyone run arachne-pnr tests? Does anyone notice that the CI is red? Does anyone other than me even care about that?

daveshah1 commented 6 years ago

Looks good to me, I'm happy for you to merge this @cliffordwolf

104player commented 6 years ago

I care about CI !

Hmm.. looks like it's failing since it can't find chip db data ? Last time I tried building this manually I think .. you need to install the icestorm tools to generate the chipdb that the arachne-pnr build requires.

I'm not sure how the travis build is set up to try to avoid that problem (It would seem to be a dependant build like .. arachne-pnr version Y depends on icestorm tools (chipdb) version X)

I guess one way would be to build against (some given version of) icestorm's chipdb .. and then when this breaks / needs upgrading, have someone go in and change the version that it builds against)

I don't have any access or permissions, etc. to go in and change this as far as I know though.

daveshah1 commented 6 years ago

@104player you're correct, it is using icestorm from a PPA which is very out of date and missing chipdbs for the 384 and 5k; which are needed for the build. The solution would be to fetch the latest icestorm from Github every time and build it before arachne-pnr.

If you want to have a go at fixing it, I will happily get fixes merged. If you create a pull request with .travis.yml changed, Travis will use this to build the PR, so no access or permissions are needed to experiment.