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YosysHQ / arachne-pnr

Place and route tool for FPGAs
MIT License
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Check SB_LVDS_INPUT against DPxxB #97

Closed tomverbeure closed 6 years ago

tomverbeure commented 6 years ago

This patch checks if an LVDS input pin has been assigned to a DPxxA input, and aborts when it's a DPxxB input.

Without this patch, arachne asserts during the placement phase.

I don't know what the official Lattice tools do in such case. It's possible that it can deal with assignments to both inputs? In that case, for compatibility, it would be better for arachne to behave the same. But that'd be a much more complex fix.

This fixes issue #50 and issue #37.

tomverbeure commented 6 years ago

Upon further inspection, it looks like I switched DPxxA and DPxxB, and that arachne crashes when the PACKAGE_PIN is connected to DPxxA.

I've changed the error message, but the DPxxB requirement is not intuitive, and should probably fixed at some point.