YosysHQ / icestorm

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
ISC License
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Ft2232d fixes #259

Open dl8dtl opened 4 years ago

dl8dtl commented 4 years ago

When debugging a custom iCE40UP5K board that uses an FT2232D chip to configure the flash/FPGA, I noticed a few things in iceprog that don't work with the "D" variant.

First ist, the "divide clock by 5" command is (obviously) only available on the HS-USB chips. Issuing it on an FT2232D causes the entire sequence to go wrong. E.g. reading the flash signature bytes returns two additional 0xFF bytes before the actual signature then. Since the command is only meant to make the USB-HS chips (FT2232H etc.) compatible with the FT2232D, the solution is to simply omit it for the latter.

Further, the commands 0x8E/0x8F used in the mpsse_senddummy{bits,bytes} functions are also only available on the USB-HS chips. These commands are used to send the 49 dummy bits required by the iCE40 documentation once CDONE has been asserted at the end of configuration. However, since only "at least 49 bits" are required, a generic way to issue them is to just send full 7 dummy bytes instead. This can be done using mpsse_send_spi which is also available on the FT2232D.

While analyzing all this, I found the Radiant programmer issues a command during startup that retrieves a kind of signature ID from the FPGA. If this command yields 0xFFFFFFFF, this is a strong indication the board has not been correctly jumpered for SRAM operation, so I added it to iceprog, too.

smunaut commented 4 years ago

The SRAM signature read should probably be in a function and not just pasted in there.

dl8dtl commented 4 years ago

The SRAM signature read should probably be in a function and not just pasted in there.

Good idea, did it that way.