Closed dmanjun5 closed 1 month ago
This is not related to oss-cad-suite but it is to Yosys. If you are using OpenRoad packaged version note that it can be older version of Yosys so please do check with latest one, but I suggest opening issue on Yosys repo, or marking here if it is still a problem with latest Yosys so I can transfer issue on that repo.
Yeah, I have created an issue in the actual yosys repository. It still is a problem even in the latest Yosys version. https://github.com/YosysHQ/yosys/issues/4441
Thanks, closing it here since it is unrelated to oss-cad-suite
4.24. Executing ABC pass (technology mapping using ABC). 4.24.1. Extracting gate netlist of module/input.blif'..
ERROR: ABC: execution of command "/opt/openroad/yosys/bin/yosys-abc -s -f /tmp/yosys-abc-HY7ss5/abc.script 2>&1" failed: return code 139.
Command exited with non-zero status 1
Elapsed time: 2:27:39[h:]min:sec. CPU time: user 8719.57 sys 139.25 (99%). Peak memory: 33091744KB.
make: *** [/opt/openroad/openroad_flow_scripts/flow/Makefile:372: /working_dir/HLS_output/Synthesis/bash_flow/openroad/results/nangate45/main_kernel/base/1_1_yosys.v] Error 1
\main_kernel' to
Most of my designs were failing at yosys-abc Technology Mapping stage. I debugged and found out that if the 'input.blif' is a few 100s of MB, then it works fine. When the 'input.blif' is in GBs, it throws a segmentation fault.