YosysHQ / oss-cad-suite-build

Multi-platform nightly builds of open source digital design and verification tools
ISC License
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iverilog uses wrong path in output file #9

Closed XarkLabs closed 3 years ago

XarkLabs commented 3 years ago

Icarus Verilog appears to use the "build" path "/yosyshq" in its output, causing simulations to fail to start on end-user installations. E.g.:

iverilog -g2012 -o sim/xosera_tb sim/xosera_tb.sv
sim/xosera_tb 
bash: sim/xosera_tb: /yosyshq/bin/vvp: bad interpreter: No such file or directory