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YosysHQ / picorv32

PicoRV32 - A Size-Optimized RISC-V CPU
ISC License
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spimemio documentation: read latency reset value #145

Closed Novakov closed 4 years ago

Novakov commented 4 years ago

According to https://github.com/cliffordwolf/picorv32/blob/c06ba38113b98b4996aed6d523667444a5d83bf6/picosoc/spimemio.v#L111 the reset value for Read latency (dummy) cycles is 8 cycles, not 0.