From my understanding, the purpose of this snippet is to write the SPI configuration passed in a2 to the SPI Flash Controller Config Register, which is memory-mapped at t0 = 0x02000000, by bit-banging the SPI protocol. However, it seems to me that srli t4, t2, 7 discards all but the MSB of the instruction by shifting them off the register. In other words, the 7 lowest bits of a2 are ignored, which I assume is not what you meant?
Not related to the issue described above, but can you also explain the usage of flashio to me?
It looks like the instructions such as RDAR 65h, WREN 06h, WRAR 71h stored in uint8_t buffer[8]; are executed, but where can I learn about these arcane instructions, and are they specific to a certain SPI chip/controller or universal?
I am trying to port picosoc to TinyFPGA-BX. To do that, I'm walking myself through the codebase, and this piece of code looks suspicious.
https://github.com/cliffordwolf/picorv32/blob/e308982e18fc952a8d446ddb7ea8b70433a998c2/picosoc/start.s#L113-L126
From my understanding, the purpose of this snippet is to write the SPI configuration passed in
a2to the SPI Flash Controller Config Register, which is memory-mapped att0 = 0x02000000, by bit-banging the SPI protocol. However, it seems to me thatsrli t4, t2, 7discards all but the MSB of the instruction by shifting them off the register. In other words, the 7 lowest bits ofa2are ignored, which I assume is not what you meant?Not related to the issue described above, but can you also explain the usage of
flashioto me?https://github.com/cliffordwolf/picorv32/blob/e308982e18fc952a8d446ddb7ea8b70433a998c2/picosoc/firmware.c#L45-L56
It looks like the instructions such as
RDAR 65h,WREN 06h,WRAR 71hstored inuint8_t buffer[8];are executed, but where can I learn about these arcane instructions, and are they specific to a certain SPI chip/controller or universal?