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PicoRV32 - A Size-Optimized RISC-V CPU
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picorv32_pcpi_div: Compactify logic #216

Open maikmerten opened 2 years ago

maikmerten commented 2 years ago

Overview

The current version of picorv32_pcpi_div can be compactified a bit:

  1. For both the quotient and the dividend negated versions are created and the result is selected between quotient, -quotient, dividend and -dividend. This creates two instances of negation logic. This can be reduced to one instance of negation logic by first selecting between quotient and dividend and THEN negating. ("idea 1")
  2. The computation is finished when the quotient-mask only contains zero-bits. Given that only one bit is set, a "finished"-flag can be generated from a single position of the quotient-mask shift register, instead of looking at all bits. ("idea 2")

Results

Current master, synthesized for iCE40:

=== picorv32_pcpi_div ===

   Number of wires:                274
   Number of wire bits:           1503
   Number of public wires:         274
   Number of public wire bits:    1503
   Number of memories:               0
   Number of memory bits:            0
   Number of processes:              0
   Number of cells:               1094
     SB_CARRY                      214
     SB_DFF                         34
     SB_DFFE                        64
     SB_DFFESR                      96
     SB_DFFESS                       1
     SB_DFFSR                        5
     SB_LUT4                       680

With "idea 1" implemented:

=== picorv32_pcpi_div ===

   Number of wires:                240
   Number of wire bits:           1274
   Number of public wires:         240
   Number of public wire bits:    1274
   Number of memories:               0
   Number of memory bits:            0
   Number of processes:              0
   Number of cells:                914
     SB_CARRY                      184
     SB_DFF                         34
     SB_DFFE                        64
     SB_DFFESR                      96
     SB_DFFESS                       1
     SB_DFFSR                        5
     SB_LUT4                       530

With "idea 1" and "idea 2" implemented

=== picorv32_pcpi_div ===

   Number of wires:                234
   Number of wire bits:           1254
   Number of public wires:         234
   Number of public wire bits:    1254
   Number of memories:               0
   Number of memory bits:            0
   Number of processes:              0
   Number of cells:                899
     SB_CARRY                      184
     SB_DFF                         34
     SB_DFFE                        64
     SB_DFFESR                      97
     SB_DFFESS                       1
     SB_DFFSR                        5
     SB_LUT4                       514

Pitfalls

Given that formal verification shifts the quotient-mask by 5 positions, I generate the "finish" flag from bit-position 1 of the shift-register (the set bit should be located at positions 31, 26, 21, 16, 11, 6, 1). This is not tested.

The division unit passes the tests done with make test, though.