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PicoRV32 - A Size-Optimized RISC-V CPU
ISC License
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read delay of PICORV32_REGS must be 0? #227

Open filamoon opened 1 year ago

filamoon commented 1 year ago

In picosoc.v, I noticed that the read data outputs (rdata1, rdata2) of "module picosoc_regs" are combination out, directly implemented using wire "assign".

Does this mean the read delay of picosoc_regs must be 0? This seems a very tough requirement.

filamoon commented 1 year ago

FYI, I use a read-delay-1 implementation of picosoc_regs in the provided testbench.v, and the tests fail immediately.