Open fayalalebrun opened 4 months ago
I recently got sby working (after seeing similar error message IIRC) for some basic example by using the latest release of oss-cad-suite.
The problem seems to be that in previous yosys, it synthesize $assume(xxxx) to be individual cell. But in latest version it use $check cell widely.
But in $check cell the TRG_WIDTH is not allowed to be set larger than 1, when async2sync
command is adopted.
This case is widely met when the reset is asynchronous one.
In those cases TRG condition have to be clk and reset both, which takes 2 bit width.
So that the multiclock on
command is required in sby file to use clk2fflogic
but async2sync
command in yosys script file, which lead to a fail.
I guess it's mainly caused by the concept of these two command where 'clk2fflogic' is targeting at global clock, but async2sync
is not.
I recently got sby working (after seeing similar error message IIRC) for some basic example by using the latest release of oss-cad-suite.
I recently got sby working (after seeing similar error message IIRC) for some basic example by using the latest release of oss-cad-suite.
This example is fully a synchronous design, so that it works as usual.
I recently updated to the newest version of sby and yosys. Now some of the formal proofs generated by SpinalHDL no longer work (SpinalHDL issue). The error is:
prep: ERROR: $check cell $cover$anon.sv:56$6 with TRG_WIDTH > 1 is not support by async2sync, use clk2fflogic.
If I add
multiclock
to[options]
orclk2fflogic
to[script]
, then I get:Here is an example: