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Yosys Open SYnthesis Suite
https://yosyshq.net/yosys/
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Handle SystemVerilog modport port renaming #2316

Open jrmoserbaltimore opened 3 years ago

jrmoserbaltimore commented 3 years ago

Latest code can't handle the below syntax:

modport Initiator
(
    input Clk,
    output Address,
    output .Dout(DInitiator), // ERROR: syntax error, unexpected '.', expecting TOK_ID
    input .Din(DTarget),
    output Access,
    output Write,
    input Ready,
    input DataReady
);

See for example but I'm not sure what this is called or where to find an official reference.

zachjs commented 3 years ago

In Section 25.5.4 of IEEE 1800-2017, these are referred to as "modport expressions." While Yosys does not yet have support for these, you may have success trying out https://github.com/zachjs/sv2v. It supports even complex modport expressions, such as concatenations and slices.