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Yosys Open SYnthesis Suite
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Throws a segmentation fault if the 'input.blif' file's size is huge. #4441

Closed dmanjun5 closed 2 weeks ago

dmanjun5 commented 2 weeks ago

Version

Yosys 0.13+15 (git sha1 bc027b2, gcc 9.4.0-1ubuntu1~20.04.1 -fPIC -Os)

On which OS did this happen?

Linux

Reproduction Steps

Untitled

Try running a huge Verilog design which generates 'input.blif' file in GBs.

Expected Behavior

Is able to generate 'input.blif' and 'output.blif' files

Actual Behavior

Throws a segmentation fault.

4.24. Executing ABC pass (technology mapping using ABC). 4.24.1. Extracting gate netlist of module \main_kernel' to/input.blif'.. ERROR: ABC: execution of command "/opt/openroad/yosys/bin/yosys-abc -s -f /tmp/yosys-abc-HY7ss5/abc.script 2>&1" failed: return code 139. Command exited with non-zero status 1 Elapsed time: 2:27:39[h:]min:sec. CPU time: user 8719.57 sys 139.25 (99%). Peak memory: 33091744KB. make: *** [/opt/openroad/openroad_flow_scripts/flow/Makefile:372: /working_dir/HLS_output/Synthesis/bash_flow/openroad/results/nangate45/main_kernel/base/1_1_yosys.v] Error 1

whitequark commented 2 weeks ago

Yosys 0.13+15 (git sha1 bc027b2, gcc 9.4.0-1ubuntu1~20.04.1 -fPIC -Os)

That is a Yosys release from two years ago. Can you reproduce this on the latest release?

dmanjun5 commented 2 weeks ago

It runs in the latest version of Yosys. OpenRoad probably has an older version still, so it isn't working there. Thank you!