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Yosys Open SYnthesis Suite
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opt_reduce: keep at least one input to $reduce_or/and cells #4614

Closed georgerennie closed 2 days ago

georgerennie commented 1 month ago

When all inputs to a $reduce_or (resp. $reduce_and) are 0 (resp 1), opt_reduce would remove them all leaving a zero width input to the cell. This can sometimes be poorly handled by other passes as in #4610, so this PR checks for that case and drives the cell by a constant.

I haven't chosen to fully replace the cell as the logic in that function would turn e.g. |{a, 1'b1, 1'b0} into |{1'b1} rather than 1'b1, so this is in keeping for the 1'b0 case. opt_expr easily eliminates this cell due to the constant input.