Open Periodic1911 opened 4 weeks ago
Yosys 0.46+11 (git sha1 0200a7680, g++ 14.2.1 -march=x86-64 -mtune=generic -O2 -fno-plt -fexceptions -fstack-clash-protection -fcf-protection -fPIC -O3)
Linux
Make a file test.v with:
test.v
module test(input [1:0] a, b, input c, output [1:0] q); wire s; assign s = c ? q[0] : q[1]; assign q = s ? a : b; endmodule
And run yosys -p "synth_ice40" test.v
yosys -p "synth_ice40" test.v
FWIW, it does not segfault when you swap the assign statements.
assign
Either an error because of a logic loop or a synthesized design. Not a segfault, in any case.
Segfault in the XAIGER backend.
... 2.41.13.3. Executing XAIGER backend. Segmentation fault (core dumped)
Full output: https://gist.github.com/Periodic1911/3618ee7299c6f9f69e6e32a9a547c4b9
Version
Yosys 0.46+11 (git sha1 0200a7680, g++ 14.2.1 -march=x86-64 -mtune=generic -O2 -fno-plt -fexceptions -fstack-clash-protection -fcf-protection -fPIC -O3)
On which OS did this happen?
Linux
Reproduction Steps
Make a file
test.vwith:And run
yosys -p "synth_ice40" test.vFWIW, it does not segfault when you swap the
assignstatements.Expected Behavior
Either an error because of a logic loop or a synthesized design. Not a segfault, in any case.
Actual Behavior
Segfault in the XAIGER backend.
Full output: https://gist.github.com/Periodic1911/3618ee7299c6f9f69e6e32a9a547c4b9