Open lhpena98 opened 5 months ago
Code results in SegFault while trying to execute Example 2 (mapped netlist) as shown in ReadMe documentation.
./abc UC Berkeley, ABC 1.01 (compiled Apr 22 2024 13:48:26) abc 01> read 7nm_lvt_ff.lib Library "ASAP7_7nm_LVT_FF" from "7nm_lvt_ff.lib" has 159 cells (26 skipped: 23 seq; 0 tri-state; 3 no func; 0 dont_use). Time = 0.70 sec Warning: Detected 2 multi-output gates (for example, "FAx1_ASAP7_75t_L"). abc 01> read -m mult-2b-mapped.v abc 02> write_edgelist mult-2b-mapped.el WriteEdgelist (Verilog-to-PyG @ https://github.com/ycunxi/Verilog-to-PyG) starts writing to mult-2b-mapped.el. Program received signal SIGSEGV, Segmentation fault.
Code results in SegFault while trying to execute Example 2 (mapped netlist) as shown in ReadMe documentation.
./abc UC Berkeley, ABC 1.01 (compiled Apr 22 2024 13:48:26) abc 01> read 7nm_lvt_ff.lib Library "ASAP7_7nm_LVT_FF" from "7nm_lvt_ff.lib" has 159 cells (26 skipped: 23 seq; 0 tri-state; 3 no func; 0 dont_use). Time = 0.70 sec Warning: Detected 2 multi-output gates (for example, "FAx1_ASAP7_75t_L"). abc 01> read -m mult-2b-mapped.v abc 02> write_edgelist mult-2b-mapped.el WriteEdgelist (Verilog-to-PyG @ https://github.com/ycunxi/Verilog-to-PyG) starts writing to mult-2b-mapped.el. Program received signal SIGSEGV, Segmentation fault.