ZFTurbo / Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA

Verilog Generator of Neural Net Digit Detector for FPGA
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Some questions about network architecture #22

Closed kangliyu1 closed 2 years ago

kangliyu1 commented 2 years ago

Hello! In the process of using your project, I encountered some problems and would like to ask you:

  1. In the current verilog/code/neuroset verilog, the neural network architecture of Figure 1 does not seem to be seen. For example, maxpooling is called only once in TOP, but maxpooling is used 3 times in the architecture of Figure 1, as if the code and architecture diagram do not correspond
  2. After reading your paper, I did not find a comparison of the software and hardware implementation results of your neural network architecture (such as speed comparison, etc.). After running python r01_train_neural_net_and_prepare_initial_weights.py, I found that the accuracy rate: 84.97%, as shown in Figure 2,but the code marked Accuracy : 97.39%, as shown in Figure 3. Is there any way to improve Accuracy? Can the maximum value given by num_conv only be 4 when the FPGA resources are sufficient?

fig1: image fig2: image fig3: image

MaKaRoIIIKa commented 2 years ago

@kangliyu1 Hello! You are wrong in your first question. In the TOP.v file, you can see that the maxpooling layer occurs more than once (lines 183, 211, 217). The architecture inherent in the hardware implementation is fully consistent with Figure 1.

ZFTurbo commented 2 years ago

Can the maximum value given by num_conv only be 4 when the FPGA resources are sufficient?

We tested only 1, 2 and 4. It's of course possible to use 8 or 16, but probably will require changes in verilog.

ZFTurbo commented 2 years ago

I did not find a comparison of the software and hardware implementation results of your neural network architecture (such as speed comparison, etc.)

We didn't do such comparsion. I think GPU will beat FPGA easily in this case )

ZFTurbo commented 2 years ago

After running python r01_train_neural_net_and_prepare_initial_weights.py, I found that the accuracy rate: 84.97%, as shown in Figure 2,but the code marked Accuracy : 97.39%, as shown in Figure 3. Is there any way to improve Accuracy?

Can you please add more details how you get these numbers?

kangliyu1 commented 2 years ago

@kangliyu1 Hello! You are wrong in your first question. In the TOP.v file, you can see that the maxpooling layer occurs more than once (lines 183, 211, 217). The architecture inherent in the hardware implementation is fully consistent with Figure 1.

Thanks for your reply, I really didn't realize it was using maxp_en = 1 to enable this whole layer, I'll be learning about it tomorrow, thank you

kangliyu1 commented 2 years ago

Can the maximum value given by num_conv only be 4 when the FPGA resources are sufficient?

We tested only 1, 2 and 4. It's of course possible to use 8 or 16, but probably will require changes in verilog.

@ZFTurbo Thank you for your reply. If num_conv is increased, where should verilog be modified? Why do you need to modify verilog when you change to 1, 2, and 4, but you need to modify verilog if you continue to modify num_conv? Can you give more detailed advice? Hope to get your advice, thank you very much! !

kangliyu1 commented 2 years ago

We didn't do such comparsion. I think GPU will beat FPGA easily in this case )

If the GPU can easily beat the FPGA, then the point of your work is to reduce power consumption and cost, right?

kangliyu1 commented 2 years ago

After running python r01_train_neural_net_and_prepare_initial_weights.py, I found that the accuracy rate: 84.97%, as shown in Figure 2,but the code marked Accuracy : 97.39%, as shown in Figure 3. Is there any way to improve Accuracy?

Can you please add more details how you get these numbers?

I just ran "python r01_train_neural_net_and_prepare_initial_weights.py" and printed out "Accuracy: 84.97%" in the terminal, as shown in Figure 1, and then "Accuracy: 97.39%" This data is the content of the comments in the code as shown in Figure 2 Show,Would like to ask how to improve Accuracy? fig1: image fig2: image log:

PS D:\research\CNN_FPGA> python r01_train_neural_net_and_prepare_initial_weights.py
Using TensorFlow backend.
_________________________________________________________________
Layer (type)                 Output Shape              Param #   
=================================================================
input_1 (InputLayer)         (None, 28, 28, 1)         0
_________________________________________________________________
conv1 (Conv2D)               (None, 28, 28, 4)         36        
_________________________________________________________________
activation_1 (Activation)    (None, 28, 28, 4)         0
_________________________________________________________________
conv2 (Conv2D)               (None, 28, 28, 4)         144
_________________________________________________________________
activation_2 (Activation)    (None, 28, 28, 4)         0
_________________________________________________________________
pool1 (MaxPooling2D)         (None, 14, 14, 4)         0
_________________________________________________________________
conv3 (Conv2D)               (None, 14, 14, 8)         288
_________________________________________________________________
activation_3 (Activation)    (None, 14, 14, 8)         0
_________________________________________________________________
conv4 (Conv2D)               (None, 14, 14, 8)         576
_________________________________________________________________
activation_4 (Activation)    (None, 14, 14, 8)         0
_________________________________________________________________
pool2 (MaxPooling2D)         (None, 7, 7, 8)           0
_________________________________________________________________
conv5 (Conv2D)               (None, 7, 7, 16)          1152
_________________________________________________________________
activation_5 (Activation)    (None, 7, 7, 16)          0
_________________________________________________________________
conv6 (Conv2D)               (None, 7, 7, 16)          2304
_________________________________________________________________
activation_6 (Activation)    (None, 7, 7, 16)          0
_________________________________________________________________
global_max_pooling2d_1 (Glob (None, 16)                0
_________________________________________________________________
dense_1 (Dense)              (None, 11)                176
_________________________________________________________________
activation_7 (Activation)    (None, 11)                0
=================================================================
Total params: 4,676
Trainable params: 4,676
Non-trainable params: 0
_________________________________________________________________
None
Skip training and load weights from weights\keras_model_low_weights_digit_detector.h5
2022-01-13 10:25:49.920490: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE instructions, but these are available on your mach
ine and could speed up CPU computations.
2022-01-13 10:25:49.921512: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE2 instructions, but these are available on your mac
hine and could speed up CPU computations.
2022-01-13 10:25:49.921728: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE3 instructions, but these are available on your mac
hine and could speed up CPU computations.
2022-01-13 10:25:49.921964: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE4.1 instructions, but these are available on your m
achine and could speed up CPU computations.
2022-01-13 10:25:49.922206: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use SSE4.2 instructions, but these are available on your m
achine and could speed up CPU computations.
2022-01-13 10:25:49.922420: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use AVX instructions, but these are available on your mach
ine and could speed up CPU computations.
2022-01-13 10:25:49.922615: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use AVX2 instructions, but these are available on your mac
hine and could speed up CPU computations.
2022-01-13 10:25:49.922810: W c:\l\tensorflow_1501918863922\work\tensorflow-1.2.1\tensorflow\core\platform\cpu_feature_guard.cc:45] The TensorFlow library wasn't compiled to use FMA instructions, but these are available on your mach
ine and could speed up CPU computations.
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Read image: ./dataset/test\7\04.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 19
Max pixel: 194
Read image: ./dataset/test\7\05.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 22
Max pixel: 186
Read image: ./dataset/test\7\06.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 35
Max pixel: 208
Read image: ./dataset/test\7\07.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 26
Max pixel: 180
Read image: ./dataset/test\7\08.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 33
Max pixel: 191
Read image: ./dataset/test\7\09.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 38
Max pixel: 189
Read image: ./dataset/test\7\10.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 70
Max pixel: 174
Read image: ./dataset/test\7\11.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 15
Max pixel: 188
Read image: ./dataset/test\7\12.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 27
Max pixel: 195
Read image: ./dataset/test\7\13.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 27
Max pixel: 195
Read image: ./dataset/test\7\14.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 43
Max pixel: 179
Read image: ./dataset/test\8\00.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 31
Max pixel: 167
Read image: ./dataset/test\8\01.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 37
Max pixel: 170
Read image: ./dataset/test\8\02.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 25
Max pixel: 197
Read image: ./dataset/test\8\03.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 21
Max pixel: 190
Read image: ./dataset/test\8\04.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 25
Max pixel: 197
Read image: ./dataset/test\8\05.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 26
Max pixel: 186
Read image: ./dataset/test\8\06.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 16
Max pixel: 189
Read image: ./dataset/test\8\07.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 37
Max pixel: 197
Read image: ./dataset/test\8\08.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 25
Max pixel: 190
Read image: ./dataset/test\8\09.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 23
Max pixel: 179
Read image: ./dataset/test\8\10.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 24
Max pixel: 189
Read image: ./dataset/test\8\11.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 32
Max pixel: 189
Read image: ./dataset/test\9\00.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 30
Max pixel: 176
Read image: ./dataset/test\9\01.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 30
Max pixel: 181
Read image: ./dataset/test\9\02.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 40
Max pixel: 175
Read image: ./dataset/test\9\03.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 44
Max pixel: 164
Read image: ./dataset/test\9\04.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 41
Max pixel: 174
Read image: ./dataset/test\9\05.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 45
Max pixel: 165
Read image: ./dataset/test\9\06.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 39
Max pixel: 162
Read image: ./dataset/test\9\07.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 40
Max pixel: 170
Read image: ./dataset/test\9\08.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
Min pixel: 48
Max pixel: 159
Read image: ./dataset/test\9\09.png Shape: (240, 320, 3)
Reduced shape: (224, 224, 3)
  3  3  3  3  3  3  3  3  3  3  3  3  3  3  4  4  4  4  4  4  4  4  4  4  4
  4  4  4  5  5  5  5  5  5  5  5  5  5  5  5  5  5  5  5  6  6  6  6  6  6
  6  6  6  6  6  6  6  6  6  6  6  6  6  7  7  7  7  7  7  7  7  7  7  7  7
  7  7  7  8  8  8  8  8  8  8  8  8  8  8  8  9  9  9  9  9  9  9  9  9  9
  9  9  9]
Predicted answers: [ 0  0  0  0  0  0  0  0  0  0  0  0  1 10  1  1  1  1  1  1  1  1  1  1  1
 10 10 10  9 10 10 10  5 10 10 10 10  2 10  2  2  2  2  2  2  2  2  2  2  2
  3 10 10  3  3  3  3  3  3  3  3  3  3  3  4  6  4  4  4  4  4  4  4  4  4
  4  4  4  5 10 10 10 10  5  5  5  5  5  5  5  5  5  5  5  5 10 10 10 10 10
 10 10  6  6  5  6  6  6  6  6  6  6  6  7 10  1 10  7  7  7  7  7  7  7  7
  7  7  7  8  8  8  8  8  8  8  8  8  8  8  8  9  9  9  9  9  9  9  9  9  9
  9  9  9]
Accuracy: 84.97%
ZFTurbo commented 2 years ago

I don't remember exactly where 97% came from. But most likely 97% accuracy was on training data which was different from what we have from camera. Images in test folder was taken from camera, and they differ from training data, so accuracy was reduced.

Also I see in log:

Skip training and load weights from weights\keras_model_low_weights_digit_detector.h5

You can delete (or better rename) file weights\keras_model_low_weights_digit_detector.h5 then training will start from begining.

kangliyu1 commented 2 years ago

@kangliyu1 Hello! You are wrong in your first question. In the TOP.v file, you can see that the maxpooling layer occurs more than once (lines 183, 211, 217). The architecture inherent in the hardware implementation is fully consistent with Figure 1.

@MaKaRoIIIKa thank you for your reply! ! Are you in charge of the verilog part of this project? I would like to ask if you have code comments for the verilog part (such as comments about the port signal function) or other information. If you have it, you can share it, thank you very much! !