ZFTurbo / Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA

Verilog Generator of Neural Net Digit Detector for FPGA
Apache License 2.0
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Questions about the architecture of CNN #28

Open kangliyu1 opened 2 years ago

kangliyu1 commented 2 years ago

Hello, I admire you for doing such an excellent job. I would like to ask how you designed this CNN architecture to achieve such good performance in the end? How did you determine the structure of the network? What are the advantages of this structure? I am a beginner of neural network accelerator, I want to learn your ideas for this work, thank you

ZFTurbo commented 2 years ago

This arcitecture was inspired by VGG neural nets, but much smaller, because hardwriting digits and MNIST dataset don't need large nets for processing: VGG article: https://arxiv.org/pdf/1409.1556.pdf