Open baogiadoan opened 5 years ago
It's different screen. We use SPI interface while yours is some kind of parallel one. Can you send exact model name of your screen?
As I remember we used this one: https://ru.aliexpress.com/item/2-8-320-240-SPI-TFT/32847628219.html
this is also SPI, I tried to buy the same but somehow it's differnt Here is the one I bought on ebay: https://www.ebay.com/itm/223145284611 FX- 2.8" 240x320 SPI TFT LCD Touch Panel ILI9341 5V 3.3V for Arduino RPi ESP8266
On Tue, 8 Jan 2019 at 07:46, ZFTurbo notifications@github.com wrote:
As I remember we used this one: https://ru.aliexpress.com/item/2-8-320-240-SPI-TFT/32847628219.html
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On your foto I see 8 pins for LCD connection, but SPI interface requires only one (for data transfer): https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
Also some of your wires connected to SD-card pins, which is not used in current project.
I tried to find the datasheet of that one, but it seems that it's from China and no documents about it.
I have another SPI OLED LCD here, can you see how to plug it with your module? [image: OLED128_pins.png] https://core-electronics.com.au/freetronics-128x128-pixel-oled-module.html
Btw, is the configuration on your picture is correct? As I see the diagram both connectors are nearly identical and parallel, but your real picture is different.
On Tue, 8 Jan 2019 at 19:47, ZFTurbo notifications@github.com wrote:
On your foto I see 8 pins for LCD connection, but SPI interface requires only one: https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
Also some of your wires connected to SD-card pins, which is not used in current project.
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Btw, I didn't see the pins XCLK, PCLK from Camero connected to any where in the diagram? And pin D1 and D3 seems to be flipped? is that correct?
I will be able to check device connections at Monday. I will post if diagram is totally correct then.
We checked connections today. It must be like that: https://github.com/ZFTurbo/Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA/blob/master/images/Connection-scheme.png
We updated picture in project.
I also made 2 fotos. Connection scheme can be restored from them: https://raw.githubusercontent.com/ZFTurbo/Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA/master/images/Conn-Foto-1.jpg https://raw.githubusercontent.com/ZFTurbo/Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA/master/images/Conn-Foto-2.jpg
Hi,
I tried to buy the same components as your spec, but it seems that there are some slight differnce and after 100% sucessful build, it didn't work at all.
Can you help to guide me how to configure with my components here, as I try to plug in as far as I know but the LCD is not working and didn't show anything.