Quartus compilation failing

ZFTurbo / Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA

Verilog Generator of Neural Net Digit Detector for FPGA

Apache License 2.0

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Open JonathanKing01 opened 5 years ago

JonathanKing01 commented 5 years ago

I'm trying to compile the Quartus project as per the Quartus readme. The compilation is failing, the error its generating says:

Error (12006): Node instance "maxpooling" instantiates undefined entity "maxp"

Something you've seen before?

Thanks for any help

ZFTurbo commented 5 years ago

Are you sure you using the latest vesrion of verilog code in repository?