search

ZipCPU / openarty

An Open Source configuration of the Arty platform
119 stars 24 forks source link

Arty S7 possible? #1

Closed mhanuel26 closed 6 years ago

mhanuel26 commented 6 years ago

Hello Dan,

I really like your work with ZipCPU.

I was wondering what must be done to use the Arty S7 board instead of the Arty A7 or if actually it might be possible. Haven't found a section about porting it.

Also, I understand ZipCPU is RISC-V processor, does it comply with RISC-V ISA full set?

Would you kindly let me know of anything please,

Best,

ZipCPU commented 6 years ago

Thanks!

I haven't tried the OpenArty design on an S7 board, nor do I have one to try it on. As I recall off the top of my head, the big difference between the A7 and the S7 is the network, right? Hence if you just removed the ethernet you might be (nearly) there. There's an "ETHERNET_ACCESS" define at the top of the rtl/busmaster.v file that you might be able to comment out and then try it. I'd probably want to spend some more time verifying the the ethernet was the only difference, though.

As for the ZipCPU ... it is a RISC processor, but not a RISC-V processor. The two instruction sets are very different. I doubt the ZipCPU implements any of the RISC-V ISA. You can read more about the ZipCPU instruction set here. Dan