ZipCPU / wb2axip

Bus bridges and other odds and ends
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Eliminate Ports S_AXI_C* Until Supported by AutoFPGA #40

Closed bobnewgard closed 3 years ago

bobnewgard commented 3 years ago

In axidmacheck, Verilator v4.202 fails to compile main.v due to unconnected axidma ports S_AXI_C. To fix this I eliminated S_AXI_C ports in wb2axip/rtl/axidma.v. Details below.

Regards, Bob Newgard

Details:

ZipCPU commented 3 years ago

Yes, the AXIDMA S_AXI_C ports need to be removed. Your fix will work temporarily as a patch, but I'd like to maintain the ability to shut the clock down--just without the S_AXI_C ports that never really added anything to that functionality. So expect an update to come, just ... not quite this one.

ZipCPU commented 3 years ago

Fixed in 1c34ceb.

Dan

bobnewgard commented 3 years ago

Thanks for considering my issue.

ZipCPU commented 3 years ago

It was my genuine pleasure.

Thanks for reporting!

Dan