Closed ndbroadbent closed 5 years ago
The ZipCPU has been successfully built for an iCE40 8khx, for the TinyFPGA, built for Altera, Xilinx 7-series, and Spartan 6's (I haven't actually tested all of these, but they will build.). The smallest device has been the Spartan 6LX9. The iCE40 8k has just a bit more space than that.
To some extent, the number of LUTs or FFs it will use depends upon both how you configure it as well as the number of peripherals you use. To get a general idea, check out the 2016 ORCONF slides (before supporting 8-bit bytes), and again the 2017 ORCONF slides (after 8-bit byte support, but before formal). I haven't measured the numbers recently, but they should be in the same ballpark.
Judging from your list, you should be able to get it to fit on the iCE40 8k, iCE40 5k, or any of the Artix-7 devices. It will not fit on any of the iCE40 1k boards--there are some 8-bit or even 16-bit forth CPU's that might fit there. I haven't tried placing it onto a Zynq or Cyclone-V SOC+FPGA, but then again I'm not sure why you would.
Another lesson to remember ... the lower the area you have available, the slower the CPU will go. It takes logic to be fully pipelined (the iCE40's don't have it), it takes logic to add a cache (data or icache). The Xilinx devices (35T+) should support both caches nicely.
Dan
Thankyou very much, that was very helpful!
this is one of those sorts of items that should stay open on the Issues (like "pinned") for others to more easily find (I always look in closed , just incase, but it gets harder when that moves off the 1st page)
I'm actually trying to do more than that. The zipcore branch, where all of my active development is taking place, now contains an automatically generated file of logic usage statistics for a variety of confugurations. You can find that file here, and the script that generates it here.
sweet thanks
Hello, I've been reading through the README and http://zipcpu.com/projects.html, but I haven't been able to find a list of supported FPGAs. (Sorry if I missed something obvious!)
Does ZipCPU have some configuration options that will allow a stripped-down version to run on a iCE40 with 1280 LUTs? Or does it require a Cyclone V / Artix 7 FPGA?
I'm collecting information to update my post on /r/FPGA. I'm new to FPGAs, so it would be helpful to know which CPU designs I can run if I buy a certain development board.
Thanks for your time!