Nets Being questioned

[tobannon]

Nets_Being_Questioned_FullTrueBP_Jan18_2019.pdf

[CoffeeIntoScience]

Comments: -Net JD0_FROC_TFC0 should be JD0_FRO_MC_TFC0. Some goofyness in replacing "ForRefOnly" in the spreadsheet with FRO. I remember this happening, but don't remember exactly the circumstances.

-Net JD0_JP1C_TFC1 is the same missing _M. changing to JD0_JP1_MC_TFC1 will also fix 'Net JD0_JP1_MC_TFC1_N/P has only one pin'

-Net JD0_JP1_THERM_EC_ADC_3_P should go to JD0 pin H38

-Net JDxAGND has only one pin: JDxAGND notation in pathfinder (used on pigtail sheets) is not the same notation used in the copy-paste files, which have JDx_AGND. Should be fixable with global replace of _AGND with AGND?

-Net JP2_JT0_P2_EAST_THERM_P/N should be changed to JD4_JP2_THERM_EC_ADC_5

[CoffeeIntoScience]

Pins JP0_d29 and JP1_b29 are both 'unused float' and should be tied to GND

[CoffeeIntoScience]

@ZishuoYang @yipengsun for future versions of the mapping "ForRefOnly" should be "FRO" and "_AGND" should be "AGND" for consistency with the pathfinder notation

[yipengsun]

For the *_AGND, that has been fixed in release 0.6.1 a couple of days ago. We noticed that problem and fixed that in our generating rules.

For ForRefOnly, that is an easy string replacement.

[yipengsun]

For _AGND, after a closer reading, I think JXX_AGND is preferred, because it clearly shows that this is connector JXX, with a netname AGND, also easier to parse from a programming point of view.

[ZishuoYang]

The updated NetlistCheck.py has picked up the following errors:

• NOT implemented: NET: JD0_JP1_MC_TFC1_N, NODE: DCB: JD0, DCB_PIN: F1, PT: JP1, PT_PIN: A9
• NOT implemented: NET: JD0_JP1_MC_TFC1_P, NODE: DCB: JD0, DCB_PIN: F2, PT: JP1, PT_PIN: B9
• NOT implemented: NET: JD0_JP1_THERM_EC_ADC_3_P, NODE: DCB: JD0, DCB_PIN: H38, PT: JP1, PT_PIN: B5
• NOT implemented: NET: GND, NODE: DCB: None, DCB_PIN: None, PT: JP0, PT_PIN: D29
• NOT implemented: NET: GND, NODE: DCB: None, DCB_PIN: None, PT: JP1, PT_PIN: B29
• NETNAME inconsistent: Implemented: NetB2_1, Specified: GND, NODE: DCB: JD10, DCB_PIN: E5, PT: None, PT_PIN: None

• List of pin-assignment corrections for @tobannon :
• [x] JP0, D29: GND
• [x] JP1, B29: GND
• [x] JD0, F1: JD0_JP1_MC_TFC1_N
• [x] JD0, F2: JD0_JP1_MC_TFC1_P
• [x] JD0, H38: JD0_JP1_THERM_EC_ADC_3_P
• [x] JD10, E5: GND
• [x] JD0, B1: JD0_FRO_MC_TFC0_N
• [x] JD0, B2: JD0_FRO_MC_TFC0_P
• [x] R403-1: JP2_JT0_P2_EAST_THERM_N Delete
• [x] R404-1: JP2_JT0_P2_EAST_THERM_P Delete
• [x] Search for all JD#AGND and replace with JD#_AGND (# is from 0 to 11. Expect to change only JP pages )

• TODO for @ZishuoYang @yipengsun:
• [x] Update AltiumNetlistGen to give JD#_*_1V5 instead of JD#_*_1V5_M
• [ ] Possibly implement net-hopping in NetlistCheck to check the following types of signals: -- JD#_JP_EC_*_N -> capacitor C# -> GND, -- *_SENSE_GND -> R# or C# -> GND, -- JD#_JP#_THERM_*_N -> net-tie NT# -> JD#_AGND, -- JD#_JP#_DC#_ELK_* -> R# -> GND

[tobannon]

List of pin-assignment corrections implemented: JP0, D29: GND ---- ‘WAS’ = NOT CONNECTED JP0, B29: GND ----NO ISSUE FOUND (ie already grounded) JD0, F1: JD0_JP1_MC_TFC1_N ---- ‘WAS’ = JD0_JP1C_TFC1_N JD0, F2: JD0_JP1_MC_TFC1_P ---- ‘WAS’ = JD0_JP1C_TFC1_P JD0, H38: JD0_JP1_THERM_EC_ADC_3_P ---- ‘WAS’ = JD0_FRO_EC_ADC_3 JD10, E5: GND ---- ‘WAS’ = NOT CONNECTED JD0, B1: JD0_FRO_MC_TFC0_N ---- ‘WAS’ = JD0_FROC_TFC0_N JD0, B2: JD0_FRO_MC_TFC0_P ---- ‘WAS’ = JD0_FROC_TFC0_p R403-1: Delete ---- ‘WAS’ = deleted JP2_JT0_P2_EAST_THERM_N & R403 R404-1: Delete ---- ‘WAS’ = deleted JP2_JT0_P2_EAST_THERM_P & R404 Search for all JD#AGND and replace with JD#_AGND (# is from 0 to 11. Expect to change only JP pages ) DONE: ‘WAS’ = JD0AGND, JD1AGND, JD3AGND, JD4AGND, JD5AGND, JD6AGND, JD7AGND, JD8AGND, JD9AGND, JD10AGND, JD11AGND NOT FOUND: JD2AGND (JD2_AGND already done)

NEW ISSUE found is JD11GND is connected only to NT50. Presume this should be JD11_AGND ----PLEASE CONFIRM

[ZishuoYang]

NEW ISSUE found is JD11GND is connected only to NT50. Presume this should be JD11_AGND ----PLEASE CONFIRM

• [x] I confirm that JD11GND should be JD11_AGND.

JP0, B29: GND ----NO ISSUE FOUND (ie already grounded)

• [x] My mistake. Should be JP1, B29 instead

• New errors found (by eye):

• [x] Depopulated _ELK_*_P should go to JD#_1V5 , instead they go to GND. Same error for a number of cases, on pigtail schematic page JP5.

• TODO:

• [x] Check depop ELKs

• [x] Check FRO ELKs

[ZishuoYang]

• [x] WIP #18, NetlistCheck picked up inconsistent net name for:
• JP2 J10, GND!= JP2_JPU0_P1_EAST_LV_SOURCE

A large number of such inconsistencies found. They are caused by the erroneous pigtail connector library component that CERN used, where the pin designators skip a letter:

This has finally been fixed by CERN in their component library attached to Altium project. - ZSY

[ZishuoYang]

• [x] WIP #18, a minor inconsistency was found for DCB remote reset netname, where on schematic there is a space between JD#_REMOTE and _RESETB. @tobannon should update the schematic to avoid space within netnames.

Done. Search & replaced text for 25 cases in total. - ZSY

[ZishuoYang]

• [x] WIP #18, found incorrect designators for depopulation resistors. To be changed to RB_###:

Done. Shown below. - ZSY

[ZishuoYang]

• [x] WIP #18, found FRO ELKs that are not properly biased. The signal types include JD#_FRO_MC_SEC_DIN_ELK and JD#_FRO_EC_SEC_DIN_ELK, e.g.

  

• [x] SEC_CLK needs net name update ? (this was seen by eye) No. -ZSY

[ZishuoYang]

While this is not regarding nets, I include the following check I did for the schematics here for documentation purpose: The SEAM pin designators and connector orientations shown in the picture have been checked/updated.

[ZishuoYang]

• [x] WIP #18, found a minor error in designators of biasing resistors for FRO ELKs. Need to update ~8 resistor names from RB_# to R#. (Because these resistors are for FRO ELKs, they should be on all variants. @tobannon )

Checking never-used FRO ELKs... No biasing resistor found in JD9_FRO_ELK_P No biasing resistor found in JD9_FRO_ELK_N No biasing resistor found in JD8_FRO_ELK_P No biasing resistor found in JD8_FRO_ELK_N No biasing resistor found in JD7_FRO_ELK_P No biasing resistor found in JD7_FRO_ELK_N No biasing resistor found in JD6_FRO_ELK_P No biasing resistor found in JD6_FRO_ELK_N No biasing resistor found in JD4_FRO_ELK_P No biasing resistor found in JD4_FRO_ELK_N No biasing resistor found in JD3_FRO_ELK_P No biasing resistor found in JD3_FRO_ELK_N No biasing resistor found in JD2_FRO_ELK_P No biasing resistor found in JD2_FRO_ELK_N No biasing resistor found in JD0_FRO_ELK_P No biasing resistor found in JD0_FRO_ELK_N

Complete list below: RB_3 RB_4 RB_7 RB_8 RB_5 RB_6 RB_11 RB_12 RB_65 RB_66 RB_13 RB_14 RB_67 RB_69 RB_70 RB_71