This adds a response channel for write transactions similar to the b channel of AXI4, in order to delay the unlock stream transfer for write buffers until all the write transactions of a command have actually been delivered to memory and have been acknowledged. It also adds a last signal to the write address channel stream to indicate the last transfer for a command, which may be used to send write fences and/or flush writeback buffers in platforms that need such things to be done explicitly.
This adds a response channel for write transactions similar to the
b
channel of AXI4, in order to delay the unlock stream transfer for write buffers until all the write transactions of a command have actually been delivered to memory and have been acknowledged. It also adds alast
signal to the write address channel stream to indicate the last transfer for a command, which may be used to send write fences and/or flush writeback buffers in platforms that need such things to be done explicitly.