error when compile gpu-simulator

[Charles-Tang]

i encounter errors when build accel-sim simulator following readme, and no previous issue related to this problem i ran

pip3 install -r requirements.txt
source ./gpu-simulator/setup_environment.sh

successfully, but failed when running make -j -C ./gpu-simulator/ here are the error message:

touch ./build/release/main.makedepend
makedepend -f./build/release/main.makedepend -p./build/release/ main.cc 2> /dev/null
make -C trace-driven depend
make[1]: Entering directory '/home/runner/accel-sim-framework/gpu-simulator/trace-driven'
touch ../build/release/trace-driven.Makefile.makedepend
makedepend -f../build/release/trace-driven.Makefile.makedepend -p../build/release/ trace_driven.cc 2> /dev/null
make[1]: 'depend' is up to date.
make[1]: Leaving directory '/home/runner/accel-sim-framework/gpu-simulator/trace-driven'
make -C trace-driven
make[1]: Entering directory '/home/runner/accel-sim-framework/gpu-simulator/trace-driven'
touch ../build/release/trace-driven.Makefile.makedepend
makedepend -f../build/release/trace-driven.Makefile.makedepend -p../build/release/ trace_driven.cc 2> /dev/null
g++ -O3 -g3 -fPIC -std=c++11 -Wall -I/usr/local/cuda/include -I. -I/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/libcuda -I/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src -c trace_driven.cc -o ../build/release/trace_driven.o 
In file included from /home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/abstract_hardware_model.h:185:0,
                 from ../ISA_Def/ampere_opcode.h:9,
                 from trace_driven.cc:40:
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/stream_manager.h: In member function 'bool CUevent_st::done() const':
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/stream_manager.h:67:40: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   bool done() const { return m_updates == m_issued; }
                              ~~~~~~~~~~^~~~~~~~~~~
In file included from trace_driven.cc:46:0:
../ISA_Def/accelwattch_component_mapping.h: At global scope:
../ISA_Def/accelwattch_component_mapping.h:61:15: error: 'TENSOR__OP' was not declared in this scope
     {OP_HMMA, TENSOR__OP},
               ^~~~~~~~~~
../ISA_Def/accelwattch_component_mapping.h:61:15: note: suggested alternative: 'TENSOR_CORE_OP'
     {OP_HMMA, TENSOR__OP},
               ^~~~~~~~~~
               TENSOR_CORE_OP
../ISA_Def/accelwattch_component_mapping.h:62:15: error: 'DP___OP' was not declared in this scope
     {OP_DADD, DP___OP},
               ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:62:15: note: suggested alternative: 'DP__OP'
     {OP_DADD, DP___OP},
               ^~~~~~~
               DP__OP
../ISA_Def/accelwattch_component_mapping.h:63:15: error: 'DP_MUL_OP' was not declared in this scope
     {OP_DFMA, DP_MUL_OP},
               ^~~~~~~~~
../ISA_Def/accelwattch_component_mapping.h:63:15: note: suggested alternative: 'FP_MUL_OP'
     {OP_DFMA, DP_MUL_OP},
               ^~~~~~~~~
               FP_MUL_OP
../ISA_Def/accelwattch_component_mapping.h:64:15: error: 'DP_MUL_OP' was not declared in this scope
     {OP_DMUL, DP_MUL_OP},
               ^~~~~~~~~
../ISA_Def/accelwattch_component_mapping.h:64:15: note: suggested alternative: 'FP_MUL_OP'
     {OP_DMUL, DP_MUL_OP},
               ^~~~~~~~~
               FP_MUL_OP
../ISA_Def/accelwattch_component_mapping.h:65:16: error: 'DP___OP' was not declared in this scope
     {OP_DSETP, DP___OP},
                ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:65:16: note: suggested alternative: 'DP__OP'
     {OP_DSETP, DP___OP},
                ^~~~~~~
                DP__OP
../ISA_Def/accelwattch_component_mapping.h:76:15: error: 'TENSOR__OP' was not declared in this scope
     {OP_IMMA, TENSOR__OP},
               ^~~~~~~~~~
../ISA_Def/accelwattch_component_mapping.h:76:15: note: suggested alternative: 'TENSOR_CORE_OP'
     {OP_IMMA, TENSOR__OP},
               ^~~~~~~~~~
               TENSOR_CORE_OP
../ISA_Def/accelwattch_component_mapping.h:128:14: error: 'TEX__OP' was not declared in this scope
     {OP_TEX, TEX__OP},
              ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:128:14: note: suggested alternative: 'MEM__OP'
     {OP_TEX, TEX__OP},
              ^~~~~~~
              MEM__OP
../ISA_Def/accelwattch_component_mapping.h:129:14: error: 'TEX__OP' was not declared in this scope
     {OP_TLD, TEX__OP},
              ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:129:14: note: suggested alternative: 'MEM__OP'
     {OP_TLD, TEX__OP},
              ^~~~~~~
              MEM__OP
../ISA_Def/accelwattch_component_mapping.h:130:15: error: 'TEX__OP' was not declared in this scope
     {OP_TLD4, TEX__OP},
               ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:130:15: note: suggested alternative: 'MEM__OP'
     {OP_TLD4, TEX__OP},
               ^~~~~~~
               MEM__OP
../ISA_Def/accelwattch_component_mapping.h:131:15: error: 'TEX__OP' was not declared in this scope
     {OP_TMML, TEX__OP},
               ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:131:15: note: suggested alternative: 'MEM__OP'
     {OP_TMML, TEX__OP},
               ^~~~~~~
               MEM__OP
../ISA_Def/accelwattch_component_mapping.h:132:14: error: 'TEX__OP' was not declared in this scope
     {OP_TXD, TEX__OP},
              ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:132:14: note: suggested alternative: 'MEM__OP'
     {OP_TXD, TEX__OP},
              ^~~~~~~
              MEM__OP
../ISA_Def/accelwattch_component_mapping.h:133:14: error: 'TEX__OP' was not declared in this scope
     {OP_TXQ, TEX__OP},
              ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:133:14: note: suggested alternative: 'MEM__OP'
     {OP_TXQ, TEX__OP},
              ^~~~~~~
              MEM__OP
../ISA_Def/accelwattch_component_mapping.h:169:16: error: 'DP___OP' was not declared in this scope
     {OP_DMNMX, DP___OP},
                ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:169:16: note: suggested alternative: 'DP__OP'
     {OP_DMNMX, DP___OP},
                ^~~~~~~
                DP__OP
../ISA_Def/accelwattch_component_mapping.h:170:15: error: 'DP___OP' was not declared in this scope
     {OP_DSET, DP___OP},
               ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:170:15: note: suggested alternative: 'DP__OP'
     {OP_DSET, DP___OP},
               ^~~~~~~
               DP__OP
../ISA_Def/accelwattch_component_mapping.h:179:15: error: 'TEX__OP' was not declared in this scope
     {OP_TEXS, TEX__OP},
               ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:179:15: note: suggested alternative: 'MEM__OP'
     {OP_TEXS, TEX__OP},
               ^~~~~~~
               MEM__OP
../ISA_Def/accelwattch_component_mapping.h:180:16: error: 'TEX__OP' was not declared in this scope
     {OP_TLD4S, TEX__OP},
                ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:180:16: note: suggested alternative: 'MEM__OP'
     {OP_TLD4S, TEX__OP},
                ^~~~~~~
                MEM__OP
../ISA_Def/accelwattch_component_mapping.h:181:15: error: 'TEX__OP' was not declared in this scope
     {OP_TLDS, TEX__OP},
               ^~~~~~~
../ISA_Def/accelwattch_component_mapping.h:181:15: note: suggested alternative: 'MEM__OP'
     {OP_TLDS, TEX__OP},
               ^~~~~~~
               MEM__OP
../ISA_Def/accelwattch_component_mapping.h:196:15: error: 'TENSOR__OP' was not declared in this scope
     {OP_BMMA, TENSOR__OP},
               ^~~~~~~~~~
../ISA_Def/accelwattch_component_mapping.h:196:15: note: suggested alternative: 'TENSOR_CORE_OP'
     {OP_BMMA, TENSOR__OP},
               ^~~~~~~~~~
               TENSOR_CORE_OP
../ISA_Def/accelwattch_component_mapping.h:246:15: error: 'TENSOR__OP' was not declared in this scope
     {OP_DMMA, TENSOR__OP},
               ^~~~~~~~~~
../ISA_Def/accelwattch_component_mapping.h:246:15: note: suggested alternative: 'TENSOR_CORE_OP'
     {OP_DMMA, TENSOR__OP},
               ^~~~~~~~~~
               TENSOR_CORE_OP
../ISA_Def/accelwattch_component_mapping.h:254:1: error: could not convert '{{OP_FADD, FP__OP}, {OP_FADD32I, FP__OP}, {OP_FCHK, FP__OP}, {OP_FFMA32I, FP_MUL_OP}, {OP_FFMA, FP_MUL_OP}, {OP_FMNMX, FP__OP}, {OP_FMUL, FP_MUL_OP}, {OP_FMUL32I, FP_MUL_OP}, {OP_FSEL, FP__OP}, {OP_FSET, FP__OP}, {OP_FSETP, FP__OP}, {OP_FSWZADD, FP__OP}, {OP_MUFU, FP_SIN_OP}, {OP_HADD2, FP__OP}, {OP_HADD2_32I, FP__OP}, {OP_HFMA2, FP_MUL_OP}, {OP_HFMA2_32I, FP_MUL_OP}, {OP_HMUL2, FP_MUL_OP}, {OP_HMUL2_32I, FP_MUL_OP}, {OP_HSET2, FP__OP}, {OP_HSETP2, FP__OP}, {OP_HMMA, <expression error>}, {OP_DADD, <expression error>}, {OP_DFMA, <expression error>}, {OP_DMUL, <expression error>}, {OP_DSETP, <expression error>}, {OP_BMSK, INT__OP}, {OP_BREV, INT__OP}, {OP_FLO, INT__OP}, {OP_IABS, INT__OP}, {OP_IADD, INT__OP}, {OP_IADD3, INT__OP}, {OP_IADD32I, INT__OP}, {OP_IDP, INT_MUL_OP}, {OP_IDP4A, INT_MUL_OP}, {OP_IMAD, INT_MUL_OP}, {OP_IMMA, <expression error>}, {OP_IMNMX, INT__OP}, {OP_IMUL, INT_MUL_OP}, {OP_IMUL32I, INT_MUL_OP}, {OP_ISCADD, INT_MUL_OP}, {OP_ISCADD32I, INT_MUL_OP}, {OP_ISETP, INT__OP}, {OP_LEA, INT_MUL_OP}, {OP_LOP, INT__OP}, {OP_LOP3, INT__OP}, {OP_LOP32I, INT__OP}, {OP_POPC, INT__OP}, {OP_SHF, INT__OP}, {OP_SHR, INT__OP}, {OP_VABSDIFF, INT__OP}, {OP_VABSDIFF4, INT__OP}, {OP_F2F, FP__OP}, {OP_F2I, FP__OP}, {OP_I2F, FP__OP}, {OP_I2I, INT__OP}, {OP_I2IP, INT__OP}, {OP_FRND, INT__OP}, {OP_MOV, INT__OP}, {OP_MOV32I, INT__OP}, {OP_PRMT, INT__OP}, {OP_SEL, INT__OP}, {OP_SGXT, INT__OP}, {OP_SHFL, INT__OP}, {OP_PLOP3, INT__OP}, {OP_PSETP, INT__OP}, {OP_P2R, INT__OP}, {OP_R2P, INT__OP}, {OP_LD, OTHER_OP}, {OP_LDC, OTHER_OP}, {OP_LDG, OTHER_OP}, {OP_LDL, OTHER_OP}, {OP_LDS, OTHER_OP}, {OP_ST, OTHER_OP}, {OP_STG, OTHER_OP}, {OP_STL, OTHER_OP}, {OP_STS, OTHER_OP}, {OP_MATCH, OTHER_OP}, {OP_QSPC, OTHER_OP}, {OP_ATOM, OTHER_OP}, {OP_ATOMS, OTHER_OP}, {OP_ATOMG, OTHER_OP}, {OP_RED, OTHER_OP}, {OP_CCTL, OTHER_OP}, {OP_CCTLL, OTHER_OP}, {OP_ERRBAR, OTHER_OP}, {OP_MEMBAR, OTHER_OP}, {OP_CCTLT, OTHER_OP}, {OP_TEX, <expression error>}, {OP_TLD, <expression error>}, {OP_TLD4, <expression error>}, {OP_TMML, <expression error>}, {OP_TXD, <expression error>}, {OP_TXQ, <expression error>}, {OP_BMOV, OTHER_OP}, {OP_BPT, OTHER_OP}, {OP_BRA, OTHER_OP}, {OP_BREAK, OTHER_OP}, {OP_BRX, OTHER_OP}, {OP_BSSY, OTHER_OP}, {OP_BSYNC, OTHER_OP}, {OP_CALL, OTHER_OP}, {OP_EXIT, OTHER_OP}, {OP_JMP, OTHER_OP}, {OP_JMX, OTHER_OP}, {OP_KILL, OTHER_OP}, {OP_NANOSLEEP, OTHER_OP}, {OP_RET, OTHER_OP}, {OP_RPCMOV, OTHER_OP}, {OP_RTT, OTHER_OP}, {OP_WARPSYNC, OTHER_OP}, {OP_YIELD, OTHER_OP}, {OP_B2R, OTHER_OP}, {OP_BAR, OTHER_OP}, {OP_CS2R, INT__OP}, {OP_CSMTEST, OTHER_OP}, {OP_DEPBAR, OTHER_OP}, {OP_GETLMEMBASE, OTHER_OP}, {OP_LEPC, OTHER_OP}, {OP_NOP, OTHER_OP}, {OP_PMTRIG, OTHER_OP}, {OP_R2B, OTHER_OP}, {OP_S2R, OTHER_OP}, {OP_SETCTAID, OTHER_OP}, {OP_SETLMEMBASE, OTHER_OP}, {OP_VOTE, OTHER_OP}, {OP_VOTE_VTG, OTHER_OP}, {OP_RRO, FP__OP}, {OP_DMNMX, <expression error>}, {OP_DSET, <expression error>}, {OP_BFE, INT__OP}, {OP_BFI, INT__OP}, {OP_ICMP, INT__OP}, {OP_IMADSP, INT_MUL_OP}, {OP_SHL, INT__OP}, {OP_XMAD, INT_MUL_OP}, {OP_CSET, INT__OP}, {OP_CSETP, INT__OP}, {OP_TEXS, <expression error>}, {OP_TLD4S, <expression error>}, {OP_TLDS, <expression error>}, {OP_CAL, OTHER_OP}, {OP_JCAL, OTHER_OP}, {OP_PRET, OTHER_OP}, {OP_BRK, OTHER_OP}, {OP_PBK, OTHER_OP}, {OP_CONT, OTHER_OP}, {OP_PCNT, OTHER_OP}, {OP_PEXIT, OTHER_OP}, {OP_SSY, OTHER_OP}, {OP_SYNC, OTHER_OP}, {OP_PSET, INT__OP}, {OP_VMNMX, INT__OP}, {OP_ISET, INT__OP}, {OP_BMMA, <expression error>}, {OP_MOVM, INT__OP}, {OP_LDSM, OTHER_OP}, {OP_R2UR, INT__OP}, {OP_S2UR, INT__OP}, {OP_UBMSK, INT__OP}, {OP_UBREV, INT__OP}, {OP_UCLEA, INT_MUL_OP}, {OP_UFLO, INT__OP}, {OP_UIADD3, INT__OP}, {OP_UIMAD, INT_MUL_OP}, {OP_UISETP, INT__OP}, {OP_ULDC, OTHER_OP}, {OP_ULEA, INT__OP}, {OP_ULOP, INT__OP}, {OP_ULOP3, INT__OP}, {OP_ULOP32I, INT__OP}, {OP_UMOV, INT__OP}, {OP_UP2UR, INT__OP}, {OP_UPLOP3, INT__OP}, {OP_UPOPC, INT__OP}, {OP_UPRMT, INT__OP}, {OP_UPSETP, INT__OP}, {OP_UR2UP, INT__OP}, {OP_USEL, INT__OP}, {OP_USGXT, INT__OP}, {OP_USHF, INT__OP}, {OP_USHL, INT__OP}, {OP_USHR, INT__OP}, {OP_VOTEU, INT__OP}, {OP_SUATOM, OTHER_OP}, {OP_SULD, OTHER_OP}, {OP_SURED, OTHER_OP}, {OP_SUST, OTHER_OP}, {OP_BRXU, OTHER_OP}, {OP_JMXU, OTHER_OP}, {OP_FCMP, FP__OP}, {OP_FSWZ, FP__OP}, {OP_ISAD, INT__OP}, {OP_LDSLK, OTHER_OP}, {OP_STSCUL, OTHER_OP}, {OP_SUCLAMP, OTHER_OP}, {OP_SUBFM, OTHER_OP}, {OP_SUEAU, OTHER_OP}, {OP_SULDGA, OTHER_OP}, {OP_SUSTGA, OTHER_OP}, {OP_ISUB, INT__OP}, {OP_HMNMX2, FP__OP}, {OP_DMMA, <expression error>}, {OP_I2FP, FP__OP}, {OP_F2IP, FP__OP}, {OP_LDGDEPBAR, OTHER_OP}, {OP_LDGSTS, OTHER_OP}, {OP_REDUX, INT__OP}, {OP_UF2FP, FP__OP}, {OP_SUQUERY, OTHER_OP}}' from '<brace-enclosed initializer list>' to 'const std::unordered_map<unsigned int, unsigned int>'
 };
 ^
In file included from /home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/cuda-sim.h:37:0,
                 from trace_driven.cc:48:
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/../gpgpu-sim/shader.h: In constructor 'scheduler_unit::scheduler_unit(shader_core_stats*, shader_core_ctx*, Scoreboard*, simt_stack**, std::vector<shd_warp_t*>*, register_set*, register_set*, register_set*, register_set*, register_set*, std::vector<register_set*>&, register_set*, int)':
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/../gpgpu-sim/shader.h:429:32: warning: 'scheduler_unit::m_spec_cores_out' will be initialized after [-Wreorder]
   std::vector<register_set *> &m_spec_cores_out;
                                ^~~~~~~~~~~~~~~~
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/../gpgpu-sim/shader.h:428:17: warning:   'register_set* scheduler_unit::m_mem_out' [-Wreorder]
   register_set *m_mem_out;
                 ^~~~~~~~~
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/../gpgpu-sim/shader.h:329:3: warning:   when initialized here [-Wreorder]
   scheduler_unit(shader_core_stats *stats, shader_core_ctx *shader,
   ^~~~~~~~~~~~~~
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/../gpgpu-sim/shader.h: In member function 'virtual bool specialized_unit::can_issue(const warp_inst_t&) const':
/home/runner/accel-sim-framework/gpu-simulator/gpgpu-sim/src/cuda-sim/../gpgpu-sim/shader.h:1234:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (inst.op != m_supported_op) {
         ~~~~~~~~^~~~~~~~~~~~~~~~~
trace_driven.cc: In function 'types_of_operands get_oprnd_type(op_type, special_ops)':
trace_driven.cc:142:42: error: 'TEX__OP' was not declared in this scope
       if ((sp_op == FP__OP) || (sp_op == TEX__OP) || (sp_op == OTHER_OP))
                                          ^~~~~~~
trace_driven.cc:142:42: note: suggested alternative: 'TEX_OP'
       if ((sp_op == FP__OP) || (sp_op == TEX__OP) || (sp_op == OTHER_OP))
                                          ^~~~~~~
                                          TEX_OP
trace_driven.cc: In member function 'bool trace_warp_inst_t::parse_from_trace_struct(const inst_trace_t&, const std::unordered_map<std::__cxx11::basic_string<char>, OpcodeChar>*, const trace_config*, const kernel_trace_t*)':
trace_driven.cc:184:3: error: 'const_cache_operand' was not declared in this scope
   const_cache_operand = 0;
   ^~~~~~~~~~~~~~~~~~~
trace_driven.cc:199:5: warning: this 'if' clause does not guard... [-Wmisleading-indentation]
     if(it2 != OpcPowerMap->end())
     ^~
trace_driven.cc:201:7: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the 'if'
       oprnd_type = get_oprnd_type(op, sp_op);
       ^~~~~~~~~~
Makefile:58: recipe for target '../build/release/trace_driven.o' failed
make[1]: *** [../build/release/trace_driven.o] Error 1
make[1]: Leaving directory '/home/runner/accel-sim-framework/gpu-simulator/trace-driven'
Makefile:76: recipe for target 'trace-driven' failed
make: *** [trace-driven] Error 2
make: Leaving directory '/home/runner/accel-sim-framework/gpu-simulator'

any solutions?

[Charles-Tang]

i encountered these errors in latest accel-sim release

[FJShen]

cd <accel-sim-framework top level dir>
git branch
cd ./gpu-simulator/gpgpu-sim
git branch

If I recall correctly, the branches you are using for accel-sim and gpgpu-sim should either be "release and master" or "dev and dev". Can you check? @JRPan should be more certain about this than me.

[Charles-Tang]

Thanks for your reply, I was using "release and master" when encounter errors above, I tried switch to "release and dev" and it worked, now I'm using accel_sim with hash "2260456ea5e6a1420f5734f145a4b7d8ab1d4737 (origin/release, origin/HEAD)", gpgpu_sim with hash "a42b72214b92b6a97f16c180ad09631cbe50da33 (origin/dev, origin/HEAD)", closing this issue

[JRPan]

release and master should work. If not there is a problem.

[JRPan]

And you should not use release and dev. Using dev + dev is a better idea. Thanks

[Charles-Tang]

ok, i will try dev + dev and see if it works

[Charles-Tang]

i tried dev+dev and it also worked, it seems only release+master fail in my environment.

[Charles-Tang]

maybe because i'm using an different distribution or gcc? Like you said, I guess dev+dev is a better idea.

[FJShen]

always make clean everything before you re-compile with a different branch. There's probably some problem with the current compilation flow. We are moving to a better CMake building flow. #279