acmpesuecc / SystemVerilog-Playground

Various basic topics for SystemVerilog Modules
MIT License
1 stars 13 forks source link

Create a 8-bit comparator #17

Open alfadelta10010 opened 1 day ago

alfadelta10010 commented 1 day ago

Design: 25 points

bunsamosa-bot[bot] commented 1 day ago

Thank you for opening this issue! A Maintainer will review it soon!

codebuddyjr commented 20 hours ago

assign me this

alfadelta10010 commented 20 hours ago

!assign @codebuddyjr 45

bunsamosa-bot[bot] commented 19 hours ago

Hey @alfadelta10010! The timer for the @codebuddyjr to work on the issue has finished, deassign and assign a new contributor or extend the current timer. Contact maintainer leads if inactive @DedLad @polarhive @achyuthcodes30

alfadelta10010 commented 19 hours ago

!deassign