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acmpesuecc / SystemVerilog-Playground

Various basic topics for SystemVerilog Modules
MIT License
1 stars 13 forks source link

Create a 4-bit Binary Multiplier #20

Open alfadelta10010 opened 2 weeks ago

alfadelta10010 commented 2 weeks ago

Design: 50 points

bunsamosa-bot[bot] commented 2 weeks ago

Thank you for opening this issue! A Maintainer will review it soon!

sujith27pes commented 2 weeks ago

Pls assign this for me @sujith27pes