Setting up the multisynth resets the R divider

[sx107]

• Arduino board: Arduino pro micro
• Arduino IDE version 1.8.10
• List the steps to reproduce the problem below (if possible attach a sketch or copy the sketch code in too):

1) Set up the frequency on some channel. For example, 5 kHz:

  clockgen.setupPLLInt(SI5351_PLL_B, 32);
  clockgen.setupMultisynth(1, SI5351_PLL_B, 900, 350 , 1);
  clockgen.setupRdiv(1, SI5351_R_DIV_128);

2) Enable the channel (not necessary here): clockgen.enableOutputs(true);

3) Try setting the frequency to 10 kHz by changing the setupMultisynth: clockgen.setupMultisynth(1, SI5351_PLL_B, 625, 0 , 1);

4) Measure the output frequency. The frequency will be not 10kHz, but 1.28MHz instead, meaning that the Rdiv setting has been reset to one by the setupMultisynth. Resetting it to 128 afterwards fixes the output frequency, however, this is a notable problem, since because of the relatively low speed at which setupMultisynth and setupRdiv functions operate a brief moment of 1.28Mhz can be observed on the scope when switching from 5kHz to 10kHz, which can cause glitches in sensitive circuits.

Solution:

Either make a function setupMultisynthAndRdiv(...), which will setup both the Rdiv and multisynth in an atomic operation, not as separate processes, or make sure that setupMultisynth does not change the Rdiv setting by remembering it.

[ladyada]

hi, we think second option is best, please submit a PR and we'll review it :)

[sx107]

Okay, as soon as I also find a way to make this function way faster, since ~300Hz frequency update frequency is just unacceptable for some uses.

[sx107]

Issue solved