Looking at the Grand Central M4 schematic, PORTD pin 8 is actually connected to MOSI, and PORTD pin 9 is actually connected to SCK; in other words variant.cpp is correct. However, in variant.h, PIN_SPI_MOSI should be for row 65 in g_APinDescription, and PIN_SPI_SCK should be for row 66.
This doesn't cause any problems with the SERCOM controlled SPI port, because both pins have the same initialization parameter from g_APinDescription, and the SPI SERCOM controls both signals directly. I guess if someone tried to use the symbols MOSI and SCK to as inputs to the simple digital pin controls this would create a problem.
It appears that these 2 pins are reversed, in variants/grand_central_m4/variant.h (line 180)
From variant.cpp, in the rows for pins 65 and 66:
Looking at the Grand Central M4 schematic, PORTD pin 8 is actually connected to MOSI, and PORTD pin 9 is actually connected to SCK; in other words variant.cpp is correct. However, in variant.h, PIN_SPI_MOSI should be for row 65 in g_APinDescription, and PIN_SPI_SCK should be for row 66. This doesn't cause any problems with the SERCOM controlled SPI port, because both pins have the same initialization parameter from g_APinDescription, and the SPI SERCOM controls both signals directly. I guess if someone tried to use the symbols MOSI and SCK to as inputs to the simple digital pin controls this would create a problem.