Open cbiffle opened 11 months ago
Yea, fair enough. In the example itself of course it's not important but it's definitely an tiresome thing to have to discover the hard way.
I've updated the example, and also kept the POR domain in reset until the PLL Is locked too, which is another thing worth demonstrating. I don't have any hardware set up conveniently to test this updated example though, is it something you could test easily?
Hi! Thanks again for these lovely examples.
The ICE40 PLL example, by creating a clock domain, disables the ICE40Platform workaround for the BRAM startup erratum. Upstream does not consider this an Amaranth bug: https://github.com/amaranth-lang/amaranth/issues/943
So, it might be worth adding a power up delay to your example, as I (for one) tried deriving something from it and the system didn't work.