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adamhlt / LiteX-CVA6

LiteX CVA6 - Fixed integration of the CPU into LiteX SoC generator
GNU General Public License v3.0
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RAM+SDRAM issues #1

Open juanschroeder opened 2 weeks ago

juanschroeder commented 2 weeks ago

Hi there, Thanks for this repo.

Were you able to make ram tests work? Did you try with a real board?

I'm trying with a Nexys4 DDR without success: https://github.com/enjoy-digital/litex/issues/2121

Thanks

adamhlt commented 2 weeks ago

Hello, Yes I did some test for RAM, but I don't remember the results. I will do some test the next week and give you my results.