Closed adumont closed 5 years ago
Fixed in e1ffa70
See https://github.com/ZipCPU/icozip/blob/master/rtl/icozip/memdev.v#L70 for another way to preload RAM/ROM, using a generate block:
generate if (HEXFILE != 0)
begin : PRELOAD_MEMORY
initial $readmemh(HEXFILE, mem);
end endgenerate
Had to place some ugly lint_off inline comments in ram.v. Need to find a way to code it better so verilator lint won't complain about it:
Verilator says:
%Warning-WIDTH: ram.v:23: Logical Operator IF expects 1 bit on the If, but If's VARREF 'ROMFILE' generates 104 bits.
https://github.com/adumont/hrm-cpu/blob/ac54b4b4b5dd244906eec40427632a7fefcb2484/verilog/ram.v#L22