Need a way to switch into prog mode via UART. (ver señales DTR o RTS)
When switching to prog mode, reset PC.
When in prog mode, all data received in Inbox is written sequentially (incressing PC) to PROG ram.
I am thinking of implementing the logic in the FSM, as an alternative branch, that way I can reuse the control path and data path to/from RX (inbox with FIFO), and PROG.
Need a way to switch into prog mode via UART. (ver señales DTR o RTS) When switching to prog mode, reset PC. When in prog mode, all data received in Inbox is written sequentially (incressing PC) to PROG ram.
See this thread on FPGAwars : https://groups.google.com/d/msgid/fpga-wars-explorando-el-lado-libre/CABqu7xqtcHW25OCdn7%2B5GCJP8J14xkJJHbxkthLfOk_ZT_89pg%40mail.gmail.com?utm_medium=email&utm_source=footer
I am thinking of implementing the logic in the FSM, as an alternative branch, that way I can reuse the control path and data path to/from RX (inbox with FIFO), and PROG.