Closed adumont closed 4 years ago
$ make -C ROT13 -f ../tester.mk make: Entering directory '/home/adumont/hrmcpu/verilog/test/ROT13' ../../../logisim/prog/assembler PROG >/dev/null && rm PROG.BIN iverilog ../../ufifo.v ../../ALU.v ../../MEMORY.v ../../XALU.v ../../LEDS.v ../../RAND.v ../../ram.v ../../mem_wrapper.v ../../REG.v ../../IR.v ../../PROG.v ../../WAIT.v ../../PC.v ../../ControlUnit.v ../../hrmcpu.v ../../test/tester.v -DPROGRAM=\"program\" -DROMFILE=\"ram\" -DINBFILE=\"test00.in\" -DDUMPFILE=\"test00.lxt\" -o test00.ivl ../../mem_wrapper.v:45: warning: Port 4 (rst) of XALU expects 1 bits, got 32. ../../mem_wrapper.v:45: : Pruning (signed) 31 high bits of the expression. ../../mem_wrapper.v:60: warning: Port 4 (rst) of LEDS expects 1 bits, got 32. ../../mem_wrapper.v:60: : Pruning (signed) 31 high bits of the expression. ../../mem_wrapper.v:74: warning: Port 4 (rst) of RAND expects 1 bits, got 32. ../../mem_wrapper.v:74: : Pruning (signed) 31 high bits of the expression. vvp test00.ivl -lxt > test00.test_out grep "TX OUT:" test00.test_out | awk '{ print $4 }' | diff -q test00.out - >/dev/null && \ ( touch test00.check; printf "%b" "\033[0;32mROT13: Test [test00] OK\033[m\n" ) || \ ( printf "%b" "\033[0;31mROT13: Test [test00] FAILED\033[m\n" ; false ) ROT13: Test [test00] OK ROT13: Success, all tests passed rm test00.ivl test00.test_out make: Leaving directory '/home/adumont/hrmcpu/verilog/test/ROT13'
Mem_wrapper should have a rst port and propagate the signal to the submodules.
implemented in #43