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Minimum Timestep causes distortion #293

Open physicboy opened 1 year ago

physicboy commented 1 year ago

Hi Teams,

I realized that the minimum timestep parameters when using predictive solver can causes distortion under two cases:

  1. Extreme low or high duty cycle Assuming 5% duty or 95% duty on 25kHz PWM so the distance between on and off is 2us. In this case 1us minimum time step can distort the duty cycle quite significantly
  2. Multiphase converter After switching event of one phase, it is possible that the minimum timestep to interfere with switching time of the other phase if it happened in close time proximity

Thanks Arief

manu-aesim commented 1 year ago

Hi Arief,

  1. This is not really a bug but expected behaviour since minimum time step is also the accuracy of discontinuity events. If the period is 2us the min time step can't be equal to 1us since you can have an inacuracy of about 2*min_time_step (one at the beginning and one other at the end of the period). In this case, I recommend to have a min time step below than 0.1us.

  2. It is hard to assist you without more info. Is there a design you would like to share to illustrate this ?

Thanks, Manu.

physicboy commented 1 year ago

Hi Manu,

  1. Unfortunately, lowering the minimum time step is not always desirable... for example for losses analysis where I need to run the simulation for long total time to ensure steady state but I also need to ensure accurate simulation waveform.

  2. Please check my the sketch in the attachment to illustrate my point.

Potential conditions that can violate the minimum timestep.docx

I think the possible solution for these problem are:

  1. Using the https://github.com/aesim-tech/simba-project/issues/255#issue-1658816365
  2. Implement the minimum time step as local event for each node with discontinuity (diode or PWM comparator) instead of global minimum time step

Thanks, Arief,

physicboy commented 1 year ago

Anyway, please note that for a three phase inverter as in the example 2, the resulting distortion should be not too significant because the converter will only be in that condition for 2-3 pwm periods

But, for interleaved DC/DC the situation can become quite severe as the converter will be in the particular duty cycle continuously

manu-aesim commented 1 year ago

Hi Arief,

I understand your point of view. I'm working on a new version of the solver where the behavior of discontinuity events is improved. Today, we only interpolate discontinuity events (between two time steps) for diode switching events and I want to do this type of interpolation for all switching events. It's a bit complicated, but it will greatly improve the simulation results when the minimum time step is large compared to the time between two switching events.

In the meantime, the only option is to reduce the min time step parameter.

I plan in changing this code for the 23.10 release.

Regards, Manu.

physicboy commented 1 year ago

Hi Manu,

well noted. looking forward to that implementation.

as always, I will be open to do beta testing for this new solver implementation

Arief,