Right now, the whole 22 ms period of the RC PWM is read as a 16-bit counter value.
Perhaps one could not read the entire period, since only the ~1-2 ms of pulse width is interesting.
This would increase the resoluiton over the pulse, but might make it harder to count the period (one might have to check how many counter period resets/overflows there are between flanks)
This would increase the counter reset period from ~36 Hz to perhaps 200 or 400 Hz.
Right now, the whole 22 ms period of the RC PWM is read as a 16-bit counter value.
Perhaps one could not read the entire period, since only the ~1-2 ms of pulse width is interesting.
This would increase the resoluiton over the pulse, but might make it harder to count the period (one might have to check how many counter period resets/overflows there are between flanks)
This would increase the counter reset period from ~36 Hz to perhaps 200 or 400 Hz.