Question about i386 target triple

[axt]

Hi. Sorry, maybe a noob question. I've succesfully built dagger on my x86_64 machine. When I issue

llvm-dec <32bit executable ELF>

it fails with:

error: no dc translator for target i386-unknown-unknown

The same works fine with 64 bit ELFs.

Is it possible to build dagger to support both architectures? If not is it possible to create another build which supports i386 target on a x86_64 host?

[ahmedbougacha]

It is, it just hasn't been tested before ;)

If you want to give it a shot, the starting point would be to add, in LLVMInitializeX86TargetDC() (lib/Target/X86/X86DCInfo.cpp):

  TargetRegistry::RegisterDCTranslator(getTheX86_32Target(),
                                       createX86DCTranslator);

A lot will just work, but there are a couple FIXMEs assuming x86_64. Most should be easy to fix; patches very welcome, but bug reports are welcome too!

[axt]

I've added that line. Now if I run llvm-dec sample32 it fails at the first instruction of main.

Cannot translate instruction: 
    PUSH32r: <MCInst 2331 <MCOperand Reg:21>>
Couldn't translate instruction

UNREACHABLE executed at /home/axt/Actual/Tools/dagger/lib/DC/DCTranslator.cpp:144!
[...]
Stack dump:
0.  Program arguments: llvm-dec sample32 
1.  DC: Translating Function at address 80484ED
2.  DC: Translating Basic Block at address 80484ED
3.  DC: Translating instruction PUSH32r at address 80484ED

[ahmedbougacha]

Ah, that's one of the few instructions that's definitely going to be 32-bit specific. lib/Target/X86/X86Sema.td has semantics for PUSH64r and POP64r (the 64-bit-mode-only variants of push/pop, that operate on 8 bytes), but not PUSH32r/POP32r. Here's a simple patch that should fix that:

 lib/Target/X86/X86Sema.td | 5 +++++
 1 file changed, 5 insertions(+)

diff --git i/lib/Target/X86/X86Sema.td w/lib/Target/X86/X86Sema.td
index c6e1e64..81c12da 100644
--- i/lib/Target/X86/X86Sema.td
+++ w/lib/Target/X86/X86Sema.td
@@ -193,6 +193,11 @@ def : Semantics<POP64r, [(set RSP, (add RSP, 8)),
 def : Semantics<POP64rmm, [(set RSP, (add RSP, 8)),
                            (store addr:$dst, (load (sub RSP, 8)))]>;

+def : Semantics<PUSH32, [(store GR32:$reg, (sub ESP, 4)),
+                          (set ESP, (sub ESP, 4))]>;
+def : Semantics<POP32r, [(set ESP, (add ESP, 4)),
+                         (set GR32:$reg, (load (sub ESP, 4)))]>;
+
 def : Semantics<PUSHF64, [(store EFLAGS, (sub RSP, 4)),
                           (set RSP, (sub RSP, 4))]>;
 def : Semantics<POPF64, [(set RSP, (add RSP, 4)),

I suspect that calls are also going to be problematic. I'll try adding enough support for a hello world when I get a chance.

Sorry for the belated reply, was away for a couple weeks. Let me know if you find more!